Repeater Controller. AX88850 Datasheet

AX88850 Controller. Datasheet pdf. Equivalent

Part AX88850
Description 100BASE-TX/FX Repeater Controller
Feature www.DataSheet4U.com ASIX AX88850 100BASE-TX/FX Repeater Controller ASIX AX88850 100BASE-TX/FX Rep.
Manufacture ASIX Electronics Corporation
Datasheet
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AX88850
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ASIX
AX88850
100BASE-TX/FX Repeater Controller
ASIX AX88850
100BASE-TX/FX
Repeater Controller
Data Sheet(11/03/’97)
DOCUMENT NO. : AX850D2.DOC
This data sheets contain new products information. ASIX ELECTRONICS reserves the rights to modify the products
specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent
accompany the sale of the product.
ASIX ELECTRONICS CORPORATION
2F, NO.13, Industry East Rd. II, Science-based Industrial Park, Hsin-Chu City, Taiwan, R.O.C.
TEL: 886-3-579-9500
FAX: 886-3-579-9558
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AX88850
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AX88850
CONTENTS
PRELIMINARY
1.0 AX88850 OVERVIEW ......................................................................................................................................... 5
1.1 GENERAL DESCRIPTION ....................................................................................................................................... 5
1.2 FEATURES............................................................................................................................................................ 6
1.3 BLOCK DIAGRAM................................................................................................................................................. 7
1.4 PIN CONNECTION DIAGRAM FOR AX88851 (16MII + 2MII MODE) .................................................................... 8
1.5 PIN CONNECTION DIAGRAM FOR AX88852 (8MII + 2MII MODE) ...................................................................... 9
1.6 PIN CONNECTION DIAGRAM FOR AX88853 (8PCS + 2MII MODE) ................................................................... 10
1.7 PIN CONNECTION DIAGRAM FOR AX88854 (MANAGEMENT MODE).................................................................. 11
2.0 PIN DESCRIPTION........................................................................................................................................... 12
2.1A PCS INTERFACE ............................................................................................................................................. 12
2.1B MII INTERFACE (SHARE BUS MII GROUP 0 PORT & MII GROUP 1 PORT) ........................................................ 13
2.2 MII INTERFACE ( TWO INDIVIDUAL MII PORTS ) ............................................................................................... 14
2.3 STATION MANAGEMENT INTERFACE.................................................................................................................. 15
2.4 MANAGEMENT INFORMATION BASE (MIB) INTERFACE..................................................................................... 15
2.5 EXPANSION BUS INTERFACE .............................................................................................................................. 16
2.7 MISCELLANEOUS ............................................................................................................................................... 19
3.0 FUNCTIONAL DESCRIPTION ...................................................................................................................... 20
3.1 PCS INTERFACE LOGIC ...................................................................................................................................... 20
3.2 CARRIER INTEGRITY MONITOR STATE MACHINE ( AX88853 PCS MODE ONLY ).............................................. 20
3.3 REPEATER STATE MACHINE .............................................................................................................................. 20
3.4 JABBER STATE MACHINE................................................................................................................................... 21
3.5 PARTITION STATE MACHINE.............................................................................................................................. 21
3.6 EXPANSION LOGIC(CASCADE INTERFACE)......................................................................................................... 22
3.7 MANAGEMENT LOGIC........................................................................................................................................ 22
3.8 MANAGEMENT COUNTERS................................................................................................................................. 23
3.9 STATION MANAGEMENT ACCESS INTERFACE .................................................................................................... 23
3.10 RID RECEIVE-TRANSMIT INTERFACE(DAISY CHAIN LOGIC) ........................................................................... 23
3.11 LED INTERFACE .............................................................................................................................................. 25
3.11.1 LED Status Driver wave-form for AX88851 ............................................................................................ 25
3.11.2 LED Status Driver wave-form for AX88852 ............................................................................................ 26
3.11.3 LED Status Driver wave-form for AX88853 ............................................................................................ 26
3.11.4 LED Status Driver wave-form for AX88854 ............................................................................................ 27
3.12 POWER ON CONFIGURATION(INITIAL SETTING) ............................................................................................... 27
4.0 REGISTERS........................................................................................................................................................ 28
4.1 PAGE 0 REGISTER MAP..................................................................................................................................... 28
4.2 PAGE 1 REGISTER MAP ..................................................................................................................................... 29
4.3 PAGE 2 REGISTER MAP..................................................................................................................................... 29
4.4 PAGE 3 REGISTER MAP..................................................................................................................................... 29
4.5 CONFIGURATION REGISTER (CONFIG) ............................................................................................................. 30
4.6 PAGE REGISTER (PAGE) ................................................................................................................................... 30
4.7 PARTITION STATUS REGISTER (PARTITION) ................................................................................................... 31
4.8 JABBER STATUS REGISTER (JABBER) .............................................................................................................. 31
4.9 ADMINISTRATION REGISTER (ADMIN) ............................................................................................................. 31
4.10 DEVICE ID REGISTER (DEVICEID) ................................................................................................................ 32
4.11 SILICON REVISION REGISTER ........................................................................................................................... 32
4.12 PORT MANAGEMENT COUNTER REGISTERS ..................................................................................................... 33
4.12.1 Short Event Counter Registers................................................................................................................. 33
4.12.2 Late Event Counter Registers .................................................................................................................. 33
4.12.3 Collision Counter Registers ..................................................................................................................... 33
4.12.4 Auto-Partition Counter Registers ............................................................................................................ 33
4.12.5 False Carrier Counter Registers.............................................................................................................. 33
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