Bripeater Controller. AX88871AP Datasheet

AX88871AP Controller. Datasheet pdf. Equivalent

Part AX88871AP
Description 10/100BASE Dual Speed Bripeater Controller
Feature www.DataSheet4U.com ASIX AX88871AP 10/100BASE Dual Speed Bripeater Controller ASIX AX88871AP 10/1.
Manufacture ASIX Electronics Corporation
Datasheet
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AX88871AP
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ASIX AX88871AP
10/100BASE Dual Speed Bripeater Controller
ASIX AX88871AP
10/100BASE
Dual Speed “Bripeater” Controller
Data Sheets (08/11/’ 99)
Always contact ASIX for possible updates
before starting a design.
DOCUMENT NO. : AX871A-05.DOC
This data sheets contain new products information. ASIX ELECTRONICS reserves the rights to modify the products
specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent
accompany the sale of the product.
ASIX ELECTRONICS CORPORATION
2F, NO.13, Industry East Rd. II, Science-based Industrial Park, Hsin-Chu City, Taiwan, R.O.C.
TEL: 886-3-579-9500
FAX: 886-3-579-9558
http://www.asix.com.tw
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AX88871AP
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AX88871AP Bripeater
CONTENTS
1.0 AX88871A OVERVIEW..................................................................................................................................... 4
1.1 GENERAL DESCRIPTION...................................................................................................................................... 4
1.2 FEATURES.......................................................................................................................................................... 5
1.3 BLOCK DIAGRAM ............................................................................................................................................... 6
1.4 PIN CONNECTION DIAGRAM (MODE 0)................................................................................................................. 7
1.5 PIN CONNECTION DIAGRAM (MODE 1)................................................................................................................. 8
2.0 PIN DESCRIPTION ........................................................................................................................................... 9
2.1 MII INTERFACES ................................................................................................................................................ 9
2.2 EXPANSION BUS INTERFACE FOR 100 MBPS....................................................................................................... 10
2.3 LED DISPLAY.................................................................................................................................................. 11
2.4 BUFFER MEMORY PINS GROUP ........................................................................................................................... 12
2.5 MISCELLANEOUS.............................................................................................................................................. 13
2.6 POWER ON CONFIGURATION SETUP SIGNALS CROSS REFERENCE TABLE ................................................................ 14
3.0 FUNCTIONAL DESCRIPTION ..................................................................................................................... 15
3.1 REPEATER STATE MACHINE.............................................................................................................................. 16
3.2 RXE /TXE CONTROL .................................................................................................................................. 16
3.3 JABBER STATE MACHINE.................................................................................................................................. 17
3.4 PARTITION STATE MACHINE............................................................................................................................. 17
3.5 EXPANSION LOGIC(CASCADE INTERFACE)......................................................................................................... 17
3.6 DATA FLOW CONTROL...................................................................................................................................... 17
3.7 RID RECEIVE-TRANSMIT INTERFACE(DAISY CHAIN LOGIC)............................................................................... 18
3.8 LED DISPLAY INTERFACE ................................................................................................................................ 18
4.0 INTERNAL REGISTERS ................................................................................................................................ 20
4.1 CONFIGURATION REGISTER (CONFIG)............................................................................................................. 20
4.2 REPEATER ID REGISTER................................................................................................................................... 20
5.0 ELECTRICAL SPECIFICATION AND TIMING.......................................................................................... 21
5.1 ABSOLUTE MAXIMUM RATINGS ........................................................................................................................ 21
5.2 GENERAL OPERATION CONDITIONS................................................................................................................... 21
5.3 DC CHARACTERISTICS..................................................................................................................................... 21
5.4 AC SPECIFICATIONS ......................................................................................................................................... 22
5.4.1 MII Interface Timing Tx & Rx ................................................................................................................. 22
5.4.2 Expansion Bus ......................................................................................................................................... 23
5.4.3 SRAM read cycle and write cycle ............................................................................................................. 24
5.4.4 LED DISPLAY ......................................................................................................................................... 25
5.4.5 LED Display After Reset ......................................................................................................................... 25
5.4.6 Repeater ID Daisy Chain ......................................................................................................................... 26
6.0 PACKAGE INFORMATION........................................................................................................................... 27
APPENDIX A: APPLICATIONS.......................................................................................................................... 28
A.1 STAND-ALONG 8-PORTS 10/100MBPS HUB APPLICATION ................................................................................. 28
A.2 MULTIPLE STAND-ALONG HUB CASCADE APPLICATION (OLD STACK SCHEME) .................................................. 28
A.3 MULTIPLE STAND-ALONG HUB CASCADE APPLICATION (NEW STACK SCHEME) ................................................. 29
APPENDIX B: USING MII I/F CONNECTS TO MAC ...................................................................................... 30
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