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MB91F354A Dataheets PDF



Part Number MB91F354A
Manufacturers Fujitsu Media Devices
Logo Fujitsu Media Devices
Description (MB91F35xA) 32-Bit Proprietary Microcontroller
Datasheet MB91F354A DatasheetMB91F354A Datasheet (PDF)

www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS07-16504-3E 32-Bit Proprietary Microcontroller CMOS FR60 MB91350A Series MB91F355A/F356B/355A/354A/V350A ■ DESCRIPTION The FR families are lines of standard single-chip microcontrollers each based on a 32-bit high-performance RISC CPU, incorporating a variety of I/O resources and bus control features for embedded control applications which require high CPU performance for This FR60 family is based on FR30 and FR40 families and enhanced i.

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www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS07-16504-3E 32-Bit Proprietary Microcontroller CMOS FR60 MB91350A Series MB91F355A/F356B/355A/354A/V350A ■ DESCRIPTION The FR families are lines of standard single-chip microcontrollers each based on a 32-bit high-performance RISC CPU, incorporating a variety of I/O resources and bus control features for embedded control applications which require high CPU performance for This FR60 family is based on FR30 and FR40 families and enhanced is bus access. The FR60 family is a line of single-chip oriented microcontrollers incorporating a wealth of peripheral resources. The FR60 family is optimized for embedded control applications requiring high processing power of the CPU, such as DVD player, navigation, high performance Fax machine, and printer controls. ■ FEATURES 1. FR CPU 32-bit RISC, load/store architecture with a five-stage pipeline Maximum operating frequency: 50 MHz (using the PLL at an oscillation frequency of 12.5 MHz) 16-bit fixed length instructions (basic instructions), 1 instruction per cycle Instruction set optimized for embedded applications: Memory-to-memory transfer, bit manipulation, barrel shift etc. • Instructions adapted for high-level languages: Function entry/exit instructions, multiple-register load/store instructions (Continued) • • • • ■ PACKAGE 176-pin plastic LQFP (FPT-176P-M02) I2C license Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use, these components in an I2C system provided that the system conforms to the I2C Standard Specification as defined by Philips. DataSheet 4 U .com www.DataSheet4U.com MB91350A Series • Register interlock functions: Facilitating coding in assemblers • On-chip multiplier supported at the instruction level. Signed 32-bit multiplication: 5 cycles. Signed 16-bit multiplication: 3 cycles • Interrupt (PC, PS save): 6 cycles, 16 priority levels • Harvard architecture allowing program access and data access to be executed simultaneously • FR family instruction compatible 2. Bus Interface • • • • • • • Maximum operating frequency: 25 MHz Capable of up to 24-bit address full output (16 MB of space) 8,16-bit data output Built-in pre-fetch buffer Non-used data and address pin are usable as general I/O port. Capable of chip-select signal output for completely independent four areas settable in 64 KB minimum Support for various memory interfaces: SRAM, ROM/Flash, page mode Flash ROM, page mode ROM Basic bus cycle: 2 cycles Programmable automatic wait cycle generator capable of inserting wait cycles for each area RDY input for external wait cycles Support for fly-by transfer for DMA, which enables wait control of independent I/O Memory ROM RAM (stack) RAM (executable) MB91V350A No 16 KB 16 KB MB91F355A 512 KB 16 KB 8 KB MB91F356B 256 KB 16 KB 8 KB MB91355A 512 KB 16 KB 8 KB MB91354A 384 KB 8 KB 8 KB • • • • 3. Mounted Memory 4. DMAC (DMA Controller) • Capable of simultaneous operation of up to 5 channels (3 channels for external→external operation) • Three transfer sources (external pin, internal peripheral, software) selectable by software. (Transfer can be started from UART0/1/2.) • Addressing using 32-bit full addressing mode (increment, decrement, fixed) • Transfer modes (demand transfer, burst transfer, step transfer, block transfer) • Support for fly-by transfer (between external I/O and memory) • Selectable transfer data size: 8, 16, or 32-bit • Multi-byte transfer enabled (by software) • DMAC descriptor in IO areas (200H to 240H, 1000H to 1024H) 5. Bit Search Module (for REALOS) • Search for the position of the bit 1/0-changed first in 1 word from the MSB 6. Various Timers • 4 channels of 16-bit reload timer (including 1 channel for REALOS): Internal clock frequency selectable from among divisions by 2/8/32 (division by 64/128 selectable only for ch3) • 16-bit free-running timer: 1 channel. Output compare module: 8 channels. Input capture module: 4 channels • 16-bit PPG timer 6 channels 7. UART • UART Full duplex double buffer 5 channel • Selectable parity On/Off • Asynchronous (start-stop synchronized) or CLK-synchronous communications selectable (Continued) 2 DataSheet 4 U .com www.DataSheet4U.com MB91350A Series (Continued) • Internal timer for dedicated baud rate • External clock can be used as transfer clock • Assorted error detection functions (for parity, frame, and overrun errors) • 115 Kbps support 8. SIO • 3 channels for 8-bit data serial transfer • Shift clock selectable from among internal three and external one • Shift direction selectable (transfer from LSB or MSB) selectable 9. Interrupt Controller • Total of 17 external interrupt lines (1 nonmaskable interrupt pin and 16 normal interrupt pins available for Wake Up from STOP) • interrupt from internal peripheral • Programmable priorities (16 levels) for all interrupts except the non-maskable interrupt 10. D/A Converter • 8-bit resolution. 3 channels 11. A/D Converter • •.


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