Schottky Diode. FDFMC2P120 Datasheet

FDFMC2P120 Datasheet PDF, Equivalent


Part Number

FDFMC2P120

Description

Integrated P-Channel PowerTrench MOSFET and Schottky Diode

Manufacture

Fairchild Semiconductor

Total Page 7 Pages
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FDFMC2P120 Datasheet
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July 2005
FDFMC2P120
Integrated P-Channel PowerTrench® MOSFET and Schottky Diode
General Description
FDFMC2P120 combines the exceptional performance
of Fairchild's PowerTrench MOSFET technology with a
very low forward voltage drop Schottky barrier rectifier
in a MicroFET package.
This device is designed specifically as a single package
solution for Buck Boost. It features a fast switching, low
gate charge MOSFET with very low on-state resistance.
Applications
Buck Boost
Features
–2 A, –20 V
RDS(ON) = 125 m@ VGS = –4.5 V
RDS(ON) = 200 m@ VGS = –2.5 V
Low Profile – 0.8mm maximum – in the new package
MicroFET 3x3 mm
PIN 1 2 3
NC 1
TO BOTTOM
6A
S2
5A
TOP
6
MLP 3x3
54
BOTTOM
S3
4G
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
VDSS
VGSS
ID
VRRM
IO
PD
TJ, TSTG
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
(Note 1a)
Schottky Repetitive Peak Reverse Voltage
Schottky Average Forward Current
(Note a)
Power Dissipation (Steady State)
(Note 1a)
(Note 1b)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJA Thermal Resistance, Junction-to-Ambient
(Note 1a)
(Note 1b)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
2P120
FDFMC2P120
7’’
Ratings
–20
±12
–3.5
–10
20
2
2.4
1.2
–55 to +150
60
145
Tape width
12mm
Units
V
V
A
V
A
W
°C
°C/W
Quantity
3000 units
©2005 Fairchild Semiconductor Corporation
FDFMC2P120 Rev.E (W)
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FDFMC2P120 Datasheet
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Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown
Voltage
BVDSS
TJ
IDSS
IGSS
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage,
On Characteristics (Note 2)
VGS(th)
Gate Threshold Voltage
VGS(th)
TJ
Gate Threshold Voltage
Temperature Coefficient
RDS(on)
Static Drain–Source
On–Resistance
ID(on)
On–State Drain Current
gFS Forward Transconductance
Dynamic Characteristics
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
RG Gate Resistance
VGS = 0 V,
ID = –250 µA
ID = –250 µA, Referenced to 25°C
VDS = –16 V, VGS = 0 V
VGS = ±12 V, VDS = 0 V
VDS = VG,
ID = –250 µA
ID = –250 µA, Referenced to 25°C
VGS = –4.5 V, ID = –2 A
VGS = –2.5 V, ID = –2 A
VGS = –4.5 V, ID = –2A,TJ=125°C
VGS = –2.5 V, VDS = –5 V
VDS = –5 V, ID = –3.5 A
VDS = –10 V, V GS = 0 V,
f = 1.0 MHz
V GS = 0 V, f = 1.0 MHz
Switching Characteristics (Note 2)
td(on) Turn–On Delay Time
tr Turn–On Rise Time
td(off) Turn–Off Delay Time
tf Turn–Off Fall Time
Qg Total Gate Charge
Qgs Gate–Source Charge
Qgd Gate–Drain Charge
VDD = –10 V, ID = –1 A,
VGS = –4.5 V, RGEN = 6
VDS = –10 V, ID = –3.5 A,
VGS = –4.5 V
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current
VSD
Drain–Source Diode Forward
VGS = 0 V, IS = –2 A (Note 2)
Voltage
trr Diode Reverse Recovery Time IF = –3.5 A,
Qrr Diode Reverse Recovery Charge dIF/dt = 100 A/µs
–20
–0.6
–10
V
–11 mV/°C
–1
±100
µA
nA
–1.0 –1.5
V
3 mV/°C
101 125
145 200
136 180
6
m
A
S
280 pF
65 pF
35 pF
7
8 16
12 22
11 20
3.2 6.4
34
0.7
1
ns
ns
ns
ns
nC
nC
nC
–2
–0.9 –1.2
13
3
A
V
nS
nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC are guaranteed by design while RθJA is determined by the user's board design.
(a). RθJA = 60°C/W when mounted on a 1in2 pad of 2 oz copper
(b). RθJA = 145°C/W when mounted on a minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
DataSheet4 U .com
FDFMC2P120 Rev.E (W)


Features Datasheet pdf www.DataSheet4U.com FDFMC2P120 July 20 05 FDFMC2P120 Integrated P-Channel Pow erTrench® MOSFET and Schottky Diode Ge neral Description FDFMC2P120 combines t he exceptional performance of Fairchild 's PowerTrench MOSFET technology with a very low forward voltage drop Schottky barrier rectifier in a MicroFET packag e. This device is designed specifically as a single package solution for Buck Boost. It features a fast switching, lo w gate charge MOSFET with very low on-s tate resistance. Applications • Buck Boost Features • –2 A, –20 V RD S(ON) = 125 mΩ @ VGS = –4.5 V RDS(O N) = 200 mΩ @ VGS = –2.5 V • Low Profile – 0.8mm maximum – in the ne w package MicroFET 3x3 mm PIN 1 2 3 TO BOTTOM NC 1 2 6 5 A A S 6 TOP 5 4 S 3 4 G BOTTOM MLP 3x3 Absolu te Maximum Ratings Symbol VDSS VGSS ID VRRM IO PD TJ, TSTG TA=25oC unless oth erwise noted Parameter Drain-Source Vo ltage Gate-Source Voltage Drain Current – Continuous – Pulsed Schottky Repetitive Peak Reverse Voltage Schottky Average Forwa.
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