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BUK75/76/7E04-40A
TrenchMOS™ standard level FET
Rev. 02 — 7 November 2001 Product data
1. Description
N-channel enhancement mode field-effect power transistor in a plastic package using TrenchMOS™ technology, featuring very low on-state resistance. Product availability: BUK7504-40A in SOT78 (TO-220AB); BUK7604-40A in SOT404 (D2-PAK); BUK7E04-40A in SOT226 (I2-PAK).
2. Features
s s s s TrenchMOS™ technology Q101 compliant 175 °C rated Standard level compatible.
3. Applications
s Automotive and general purpose power switching: x 12 V loads x Motors, lamps and solenoids.
4. Pinning information
Table 1: Pin 1 2 3 mb Pinning - SOT78, SOT404, SOT226 simplified outline and symbol Description gate (g)
mb mb
Simplified outline
mb
Symbol
d
drain (d) source (s) mounting base, connected to drain (d)
1
MBK106
g s
MBB076
2 3
MBK116
1 2 3
1 2 3
MBK112
SOT78 (TO-220AB)
SOT404 (D2-PAK)
SOT226
(I2-PAK)
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Philips Semiconductors
BUK75/76/7E04-40A
TrenchMOS™ standard level FET
5. Quick reference data
Table 2: VDS ID Ptot Tj RDSon Quick reference data Conditions Tmb = 25 °C; VGS = 10 V Tmb = 25 °C VGS = 10 V; ID = 25 A Tj = 25 °C Tj = 175 °C 3.9 − 4.5 8.5 mΩ mΩ
[1]
Symbol Parameter drain-source voltage (DC) drain current (DC) total power dissipation junction temperature drain-source on-state resistance
Typ − − − −
Max 40 198 300 175
Unit V A W °C
6. Limiting values
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) Tmb = 25 °C; VGS = 10 V; Figure 2 and 3 Tmb = 100 °C; VGS = 10 V; Figure 2 IDM Ptot Tstg Tj IDR IDRM WDSS peak drain current total power dissipation storage temperature operating junction temperature reverse drain current (DC) peak reverse drain current non-repetitive avalanche energy Tmb = 25 °C Tmb = 25 °C; pulsed; tp ≤ 10 µs unclamped inductive load; ID = 75 A; VDS ≤ 40 V; VGS = 10 V; RGS = 50 Ω; starting Tmb = 25 °C
[1] [2] [1] [2] [2]
Conditions RGS = 20 kΩ
Min − − − − − − − − −55 −55 − − − −
Max 40 40 ±20 198 75 75 794 300 +175 +175 198 75 794 1.6
Unit V V V A A A A W °C °C A A A J
Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 Tmb = 25 °C; Figure 1
Source-drain diode
Avalanche ruggedness
[1] [2]
Current is limited by power dissipation chip rating Continuous current is limited by package
9397 750 09059
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 02 — 7 November 2001
2 of 15
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Philips Semiconductors
BUK75/76/7E04-40A
TrenchMOS™ standard level FET
120 Pder
(%) 100
03na19
200 ID (A) 150
03ne93
80
60
100
40
50 Capped at 75 A due to package
20
0 0 25 50 75 100 125 150 175 200
Tmb (ºC)
0 25 50 75 100 125 150 175 200 Tmb (ºC)
P tot P der = ---------------------- × 100 % P °
tot ( 25 C )
VGS ≥ 4.5 V
Fig 1. Norma.