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U6239B Dataheets PDF



Part Number U6239B
Manufacturers TEMIC Semiconductors
Logo TEMIC Semiconductors
Description 2.9 GHz PLL
Datasheet U6239B DatasheetU6239B Datasheet (PDF)

www.DataSheet4U.com U6239B 2.9 GHz PLL for SAT TV Tuner with UNi-Bus Description The U6239B is a single-chip frequency synthesizer with bidirectional I2C bus control and unidirectional 3-wire bus control, developed for SAT TV-tuner and cable tuner applications. This IC contains an integrated preamplifier, a high frequency prescaler, a reference divider with multiple programmable divider ratios, a crystal oscillator, a phase/ frequency detector together with a charge pump, a tuning amplifier and.

  U6239B   U6239B



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www.DataSheet4U.com U6239B 2.9 GHz PLL for SAT TV Tuner with UNi-Bus Description The U6239B is a single-chip frequency synthesizer with bidirectional I2C bus control and unidirectional 3-wire bus control, developed for SAT TV-tuner and cable tuner applications. This IC contains an integrated preamplifier, a high frequency prescaler, a reference divider with multiple programmable divider ratios, a crystal oscillator, a phase/ frequency detector together with a charge pump, a tuning amplifier and an analog-to-digital converter. Features D 2.9 GHz divide-by-16 prescaler integrated D UNi-BUS: I2C bus and 3-wire bus I2C bus software compatible to U6223B 3-wire bus software compatible to LC7215 (Sanyo) D I2C bus mode: 4 bidirectional ports (open collector) 2 unidirectional ports (open collector) 5 level ADC or unidirectional port (open collector) Address mode select function (AMS, Pin 3): 3 or 4 addresses selectable via Pin 10 D 3-wire bus mode: 4 unidirectional ports (open collector) Lock output (open collector) D Programmable reference divider D Low power consumption (typ. 5 V / 23 mA) D Electrostatic protection according to MIL-STD 883 Block Diagram AS / ENABLE / P3 10 SCL 5 SDA 4 UNI–BUS Control 11 P0/Lock 5–bit Latch ADC I/O Ports 7–bit Latch 8–bit Latch 7–bit Latch T1 9 P4 8 P5 7 P6 / ADC 6 P7 Vs 12 GND 15 Power–on reset POR 14–bit Shift Reg. Sync 15–bit Latch LOCK T0 5I RD1,2,3 OS AMS RFi 14 13 div. by 16 Prescaler SET 15/14–bit counter RDS divide by 256/512/off/1024 divide by 25/50/140/250 divide by 50/100/280/500 Phase detector Charge pump FR FP RDS / AMS 3 XTAL 2 Oscillator 16 VD 1 PD 9611809 Figure 1. TELEFUNKEN Semiconductors Rev. A3, 28-May-97 1 (15) DataSheet 4 U .com www.DataSheet4U.com U6239B Ordering Information Extended Type Number U6239B-AFPG3 Package SO16, plastic package Remarks Taped and reeled SSO16 package on request Pin Configuration PD Q1 1 2 16 15 14 13 12 11 VD GND RFi RFi VS P0/ Lock RDS/AMS 3 SDA SCL P7 P6/ ADC P5 4 5 6 7 8 95 10947 10 AS/ENABLE/ P3 9 P4 Circuit Description The U6239B is a single-chip PLL designed for SAT TV tuner and cable tuner. It consists of a divide-by-16 prescaler with an integrated preamplifier, a 15-bit programmable divider, a crystal oscillator, and a reference divider with selectable divider ratios, a phase/ frequency detector together with a charge pump which drives the tuning amplifier. Only one external transistor is required for varactor line driving. The device can be controlled via I2C bus format or via 3-wire bus format. It detects automatically which bus format has been received. Therefore, there is no need for a bus selection pin. In I2C bus mode, the device has four programmable or one fixed and three programmable I2C bus addresses, depending on the voltage level at Pin 3. They are ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Pin 1 2 3 Symbol PD Q1 RDS/ AMS 4 5 6 7 8 9 10 11 12 13 14 15 16 SDA SCL P7 P6/ ADC P5 P4 AS/ ENABLE/ P3 P0/Lock VS RFi RFi GND VD Function Charge pump output Crystal input Reference divider select input (3-wire bus mode) Address mode select input (I2C bus mode) Data input/ output Clock input Port 7 input/ output Port 6 output Analog-Digital-Converter input Port 5 input/ output Port 4 input/ output Address select input Enable input Port 3 output Port 0 output/Lock output Supply voltage RF input RF input Ground Active filter output programmed by applying a specific input voltage to the address select input Pin 10, enabling the use of up to four synthesizers in a system. If the fixed address is used, this pin can be used as a normal output port. The same pin serves as the enable signal input in 3-wire bus mode. Depending whether the fixed address is used or not there are five or six open collector outputs for switching functions available. In 3-wire bus mode there are four open collector outputs and one lock signal output. All open collector outputs are capable of sinking at least 10 mA. In I2C bus mode an analog-to-digital converter (ADC) is available for digital AFC (automatic frequency control) applications and the ports P4, P5 and P7 can also be used as input ports. 2 (15) TELEFUNKEN Semiconductors Rev. A3, 28-May-97 DataSheet 4 U .com www.DataSheet4U.com U6239B Functional Description The U6239B is programmed via a 2-wire I2C bus or 3-wire bus depending on the received data format. In I2C bus mode the three bus input pins 4, 5, 10 are used as SDA, SCL and address select inputs or in 3-wire bus mode as date, clock and enable inputs, respectively. The data include the scaling factor SF and port output information. In I2C bus mode there are some additional functions.


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