Dual Buffer Gate
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74HC2G34; 74HCT2G34
Dual buffer gate
Rev. 01 — 6 October 2006 Product data sheet
1. General descri...
Description
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74HC2G34; 74HCT2G34
Dual buffer gate
Rev. 01 — 6 October 2006 Product data sheet
1. General description
The 74HC2G34; 74HCT2G34 is a high-speed Si-gate CMOS device. The 74HC2G34; 74HCT2G34 provides two buffers.
2. Features
I I I I Wide supply voltage range from 2.0 V to 6.0 V Complies with JEDEC standard no. 7A High noise immunity ESD protection: N HBM JESD22-A114-D exceeds 2000 V N MM JESD22-A115-A exceeds 200 V Low power dissipation Balanced propagation delays Unlimited input rise and fall times Multiple package options Specified from −40 °C to +85 °C and −40 °C to +125 °C
I I I I I
3. Ordering information
Table 1. Ordering information Package Temperature range Name 74HC2G34GW 74HC2G34GV 74HCT2G34GW 74HCT2G34GV −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C SC-88 SC-74 SC-88 SC-74 Description plastic surface-mounted package; 6 leads plastic surface-mounted package (TSOP6); 6 leads plastic surface-mounted package; 6 leads plastic surface-mounted package (TSOP6); 6 leads Version SOT363 SOT457 SOT363 SOT457 Type number
4. Marking
Table 2. Marking Marking code PA P34 UA U34 Type number 74HC2G34GW 74HC2G34GV 74HCT2G34GW 74HCT2G34GV
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NXP Semiconductors
74HC2G34; 74HCT2G34
Dual buffer gate
5. Functional diagram
1
1A
1Y
6
1
1
6
3
2A
2Y
4
3
1
4
mnb064
A
Y
001aac536
mnb063
Fig 1. Logic symbol
Fig 2. IEC logic symbol
Fig 3. Logic diagram (one gate)
6. Pinning information
6.1 Pinning...
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