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Bidirectional Translator. ADG3301 Datasheet

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Bidirectional Translator. ADG3301 Datasheet






ADG3301 Translator. Datasheet pdf. Equivalent




ADG3301 Translator. Datasheet pdf. Equivalent





Part

ADG3301

Description

Single-Channel Bidirectional Translator



Feature


Low Voltage 1.15 V to 5.5 V, Single-Chan nel Bidirectional Logic Level Translato r ADG3301 FEATURES Bidirectional level translation Operates from 1.15 V to 5. 5 V Low quiescent current < 5 µA No di rection pin APPLICATIONS SPI®, MICROWI RE® level translation Low voltage ASIC level translation Smart card readers C ell phones and cell phone cradles Porta ble communication dev.
Manufacture

Analog Devices

Datasheet
Download ADG3301 Datasheet


Analog Devices ADG3301

ADG3301; ices Telecommunications equipment Networ k switches and routers Storage systems (SAN/NAS) Computing/server applications GPS Portable POS systems Low cost seri al interfaces GENERAL DESCRIPTION The A DG3301 is a single-channel, bidirection al logic level translator. It can be us ed in multivoltage digital system appli cations such as data transfer between a low voltage DSP/c.


Analog Devices ADG3301

ontroller and a higher voltage device. T he internal architecture allows the dev ice to perform bidirectional logic leve l translation without an additional sig nal to set the direction in which the t ranslation takes place. The voltage app lied to VCCA sets the logic levels on t he A side of the device, while VCCY set s the levels on the Y side. For proper operation, VCCA mu.


Analog Devices ADG3301

st always be less than VCCY. The VCCAcom patible logic signals applied to the A pin appear as VCCYcompatible levels on the Y pin. Similarly, VCCY-compatible l ogic levels applied to the Y pin appear as VCCA-compatible logic levels on the A pin. The enable pin (EN) provides th ree-state operation on both the A pin a nd the Y pin. When the device enable pi n is pulled low, t.

Part

ADG3301

Description

Single-Channel Bidirectional Translator



Feature


Low Voltage 1.15 V to 5.5 V, Single-Chan nel Bidirectional Logic Level Translato r ADG3301 FEATURES Bidirectional level translation Operates from 1.15 V to 5. 5 V Low quiescent current < 5 µA No di rection pin APPLICATIONS SPI®, MICROWI RE® level translation Low voltage ASIC level translation Smart card readers C ell phones and cell phone cradles Porta ble communication dev.
Manufacture

Analog Devices

Datasheet
Download ADG3301 Datasheet




 ADG3301
Low Voltage 1.15 V to 5.5 V, Single-Channel
Bidirectional Logic Level Translator
ADG3301
FEATURES
Bidirectional level translation
Operates from 1.15 V to 5.5 V
Low quiescent current < 5 µA
No direction pin
APPLICATIONS
SPI®, MICROWIRE® level translation
Low voltage ASIC level translation
Smart card readers
Cell phones and cell phone cradles
Portable communication devices
Telecommunications equipment
Network switches and routers
Storage systems (SAN/NAS)
Computing/server applications
GPS
Portable POS systems
Low cost serial interfaces
GENERAL DESCRIPTION
The ADG3301 is a single-channel, bidirectional logic level
translator. It can be used in multivoltage digital system applica-
tions such as data transfer between a low voltage DSP/controller
and a higher voltage device. The internal architecture allows the
device to perform bidirectional logic level translation without an
additional signal to set the direction in which the translation
takes place.
The voltage applied to VCCA sets the logic levels on the A side of
the device, while VCCY sets the levels on the Y side. For proper
operation, VCCA must always be less than VCCY. The VCCA-
compatible logic signals applied to the A pin appear as VCCY-
compatible levels on the Y pin. Similarly, VCCY-compatible logic
levels applied to the Y pin appear as VCCA-compatible logic levels
on the A pin. The enable pin (EN) provides three-state operation
on both the A pin and the Y pin. When the device enable pin is
pulled low, the terminals on both sides of the device are in the
high impedance state. The EN pin is referred to the VCCA supply
voltage and driven high for normal operation.
The ADG3301 is available in a compact 6-lead SC70 package
and is guaranteed to operate over the 1.15 V to 5.5 V supply
voltage range and extended −40°C to +85°C temperature range.
FUNCTIONAL BLOCK DIAGRAM
VCCA
VCCY
A
Y
EN
ADG3301
GND
Figure 1.
PRODUCT HIGHLIGHTS
1. Bidirectional level translation.
2. Fully guaranteed over the 1.15 V to 5.5 V supply range.
3. No direction pin.
4. Compact 6-lead SC70 package.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.




 ADG3301
ADG3301
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 6
ESD Caution.................................................................................. 6
Pin Configuration and Function Descriptions............................. 7
Typical Performance Characteristics ............................................. 8
Test Circuits..................................................................................... 12
Terminology .................................................................................... 15
REVISION HISTORY
12/05—Revision 0: Initial Version
Theory of Operation ...................................................................... 16
Level Translator Architecture ................................................... 16
Input Driving Requirements..................................................... 16
Output Load Requirements ...................................................... 16
Enable Operation ....................................................................... 16
Power Supplies............................................................................ 16
Data Rate ..................................................................................... 17
Applications..................................................................................... 18
Layout Guidelines....................................................................... 18
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 19
Rev. 0 | Page 2 of 20




 ADG3301
ADG3301
SPECIFICATIONS
VCCY = 1.65 V to 5.5 V, VCCA = 1.15 V to VCCY, GND = 0 V. All specifications TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter1
LOGIC INPUTS/OUTPUTS
A Side
Input High Voltage3
Input Low Voltage3
Output High Voltage
Output Low Voltage
Capacitance3
Leakage Current
Y Side
Input High Voltage3
Input Low Voltage3
Output High Voltage
Output Low Voltage
Capacitance3
Leakage Current
Enable (EN)
Input High Voltage3
Input Low Voltage3
Leakage Current
Capacitance3
Enable Time3
SWITCHING CHARACTERISTICS3
3.3 V ± 0.3 V ≤ VCCA ≤ VCCY, VCCY = 5 V ± 0.5 V
AY Level Translation
Propagation Delay
Rise Time
Fall Time
Maximum Data Rate
Part-to-Part Skew
YA Level Translation
Propagation Delay
Rise Time
Fall Time
Maximum Data Rate
Part-to-Part Skew
1.8 V ± 0.15 V ≤ VCCA ≤ VCCY, VCCY = 3.3 V ± 0.3 V
AY Translation
Propagation Delay
Rise Time
Fall Time
Maximum Data Rate
Part-to-Part Skew
Symbol Conditions
Min
Typ2
VIHA
VIHA
VILA
VOHA
VOLA
CA
ILA, HiZ
VIHY
VILY
VOHY
VOLY
CY
ILY, HiZ
VIHEN
VIHEN
VILEN
ILEN
CEN
tEN
VCCA = 1.15 V
VCCA = 1.2 V to 5.5 V
VCCA − 0.3
0.65 × VCCA
VY = VCCY, IOH = 20 µA, see Figure 27
VY = 0 V, IOL = 20 µA, see Figure 27
f = 1 MHz, EN = 0, see Figure 32
VA = 0 V/VCCA, EN = 0, see Figure 29
VCCA − 0.4
9
0.65 × VCCY
VA = VCCA, IOH = 20 µA, see Figure 28
VA = 0 V, IOL = 20 µA, see Figure 28
f = 1 MHz, EN = 0, see Figure 33
VY = 0 V/VCCY, EN = 0, see Figure 30
VCCY − 0.4
6
VCCA = 1.15 V
VCCA = 1.2 V to 5.5 V
VCCA − 0.3
0.65 × VCCA
VEN = 0 V/VCCA, VA = 0 V, see Figure 31
3
RS = RT = 50 Ω, VA = 0 V/VCCA (AY),
1
VY = 0 V/VCCY(YA), see Figure 34
tP, AY
tR, AY
tF, AY
DMAX, AY
tPPSKEW, AY
tP, YA
tR, YA
tF, YA
DMAX, YA
tPPSKEW, YA
RS = RT = 50 Ω, CL = 50 pF,
see Figure 35
RS = RT = 50 Ω, CL = 15 pF,
see Figure 36
tP, AY
tR, AY
tF, AY
DMAX, AY
tPPSKEW, AY
RS = RT = 50 Ω, CL = 50 pF,
see Figure 35
6
2
2
50
4
1
3
50
8
2
2
50
Max
0.35 × VCCA
0.4
±1
0.35 × VCCY
0.4
±1
0.35 × VCCA
±1
1.8
10
3.5
3.5
3
7
3
7
2
11
5
5
4
Unit
V
V
V
V
pF
µA
V
V
V
V
pF
µA
V
V
V
µA
pF
µs
ns
ns
ns
Mbps
ns
ns
ns
ns
Mbps
ns
ns
ns
ns
Mbps
ns
Rev. 0 | Page 3 of 20



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