IDT70T9349L

www.DataSheet4U.com PRELIMINARY HIGH-SPEED 2.5V 8/4K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM .eatures: x x x IDT70T9359/49L x x x x True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial:7.5/9/12ns (max.) – Industrial: 9ns (max.) Low-power operation – IDT70T9359/49L Active: 225mW (typ.) Standby: 1.5mW (typ.) Flow-Through or Pipelined output mode on either port via the FT/PIPE pins Counter enable and reset features Dual chip enables allow for depth expansion without additional logic x x x x Full synchronous operation on both ports – 4.0ns setup to clock and 0.5ns hold on all control, data, and address inputs – Data input, address, and control registers – Fast 7.5ns clock to data out in the Pipelined output mode – Self-timed write allows fast cycle time – 12ns cycle time, 83MHz operation in Pipelined output mode Separate upper-byte and lower-byte controls for multiplexed bus and bus matching compatibility LVTTL- compatible, single 2.5V (±100mV) power supply Industrial temperature range (–40°C to +85°C) is available for 66MHz Available in a 100-pin Thin Quad Flatpack (TQFP) and 100pin fine pitch Ball Grid Array (fpBGA) packages. .unctional Block Diagram R/WL UBL CE0L R/WR UBR CE0R CE1L LBL OEL 1 0 0/1 1 0 0/1 CE1R LBR OER FT/PIPEL 0/1 1b 0b b a 1a 0a 0a 1a a b 0b 1b 0/1 FT/PIPER I/O9L-I/O17L I/O0L-I/O8L I/O Control I/O9R-I/O17R I/O Control I/O0R-I/O8R A12L(1) A...