ADV212 Codec Datasheet

ADV212 Datasheet PDF, Equivalent


Part Number

ADV212

Description

Wavescale Video Codec

Manufacture

Analog Devices

Total Page 30 Pages
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ADV212
FEATURES
Implementation of a JPEG2000-compatible video CODEC for
video and still images through the ADV212 Wavescale
video compression/decompression engine
Identical pinout and footprint to the ADV202; and support
for all the functionality of the ADV202
Power reduction of at least 30% compared with ADV202
JTAG/boundary scan support
Patented spatial ultraefficient recursive filtering (SURF)
technology for low power, low cost wavelet-based
compression
Support for both 9/7 and 5/3 wavelet transforms with up to
5 levels of transform
9/7 wavelet support for tiles up to 1.048 million samples
5/3 wavelet support for tiles up to 262,144 samples
Video interface direct support for ITU-R BT.656, SMPTE 125M
PAL/NTSC, SMPTE 274M, SMPTE 293M (525p), and ITU-R
BT.1358 (625p) or any video format with a maximum input
rate of 65 MSPS for irreversible mode or 40 MSPS for
reversible mode
Programmable tile/image size with widths of up to
4096 pixels in single-component mode; maximum
tile/image height of 4096 pixels
Ability to combine 2 or more ADV212s to support full-frame
SMPTE 274M HDTV (1080i) or SMPTE 296M (720p)
Flexible, asynchronous SRAM-style host interface support
for glueless connection to most 16-/32-bit microcontrollers
and ASICs
2.5 V or 3.3 V input/output and 1.5 V core supply
2 package and speed grade options
12 mm × 12 mm, 121-ball CSP_BGA with a speed grade of
115 MHz
13 mm × 13 mm, 144-ball CSP_BGA with a speed grade of
150 MHz
Wavescale Video Codec
ADV212
APPLICATIONS
Networked video and image distribution systems
Wireless video and image distribution
Image archival/retrieval
Digital CCTV and surveillance systems
Digital cinema systems
Professional video editing and recording
Digital still cameras
Digital camcorders
GENERAL DESCRIPTION
The ADV212 Wavescale® video compression/decompression
(CODEC) is a single-chip JPEG2000 CODEC targeted for video
and high bandwidth image compression applications that can
benefit from the enhanced quality and features provided by the
JPEG2000 (J2K) ISO/IEC15444-1 image compression standard.
The part implements the computationally intensive operations
of the JPEG2000 image compression standard and provides
fully compliant code stream generation for most applications.
The dedicated video port of the ADV212 provides glueless con-
nection to common digital video standards such as ITU-R
BT.656, SMPTE 125M, SMPTE 293M (525p), ITU-R BT.1358
(625p), SMPTE 274M (1080i), and SMPTE 296M (720p). A
variety of other high speed, synchronous pixel and video
formats can also be supported by using the programmable
framing and validation signals.
The ADV212 is an upgrade version of the ADV202, which is
identical in pinout and footprint. It supports all of the func-
tionality of the ADV202 and has the following additional
options: JTAG/boundary scan support and power reduction of
at least 30% compared with the ADV202.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2006–2010 Analog Devices, Inc. All rights reserved.

ADV212
ADV212
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
JPEG2000 Feature Support.............................................................. 3
Functional Block Diagram .............................................................. 3
Specifications..................................................................................... 4
Supply Voltages and Current ...................................................... 4
Input/Output Specifications........................................................ 4
Clock and RESET Specifications ................................................ 5
Normal Host Mode—Write Operation ..................................... 6
Normal Host Mode—Read Operation ...................................... 7
DREQ/DACK DMA Mode—Single FIFO Write Operation .. 8
DREQ/DACK DMA Mode—Single FIFO Read Operation . 10
External DMA Mode—FIFO Write, Burst Mode .................. 12
External DMA Mode—FIFO Read, Burst Mode ................... 13
Streaming Mode (JDATA)—FIFO Read/Write ...................... 14
VDATA Mode Timing ............................................................... 15
Raw Pixel Mode Timing ............................................................ 17
JTAG Timing............................................................................... 18
Absolute Maximum Ratings.......................................................... 19
Thermal Resistance .................................................................... 19
ESD Caution................................................................................ 19
Pin Configurations and Function Descriptions ......................... 20
Theory of Operation ...................................................................... 25
Wavelet Engine ........................................................................... 25
Entropy CODECs ....................................................................... 25
Embedded Processor System .................................................... 25
REVISION HISTORY
4/10—Rev. A to Rev. B
Added Wavescale Information .................................... Throughout
Changes to Features Section............................................................ 1
Changes to Table 16........................................................................ 20
Changes to Video Interface (VDATA Bus) Section, Changes to
Table 17 ............................................................................................ 26
Changes to Hardware Boot Modes Section ................................ 31
Changes to Encode—Multichip Mode Section .......................... 34
Memory System.......................................................................... 25
Internal DMA Engine ................................................................ 25
ADV212 Interfaces......................................................................... 26
Video Interface (VDATA Bus).................................................. 26
Host Interface (HDATA Bus) ................................................... 26
Direct and Indirect Registers .................................................... 26
Control Access Registers ........................................................... 27
Pin Configuration and Bus Sizes/Modes ................................ 27
Stage Register .............................................................................. 27
JDATA Mode............................................................................... 27
External DMA Engine ............................................................... 27
Internal Registers............................................................................ 28
Direct Registers........................................................................... 28
Indirect Registers........................................................................ 29
PLL Registers .............................................................................. 30
Hardware Boot Modes and Power Considerations ............... 31
Video Input Formats ...................................................................... 32
Applications Information .............................................................. 34
Encode—Multichip Mode......................................................... 34
Decode—Multichip Master/Slave ............................................ 35
Digital Still Camera/Camcorder .............................................. 36
Encode/Decode SDTV Video Application ............................. 37
32-Bit Host Application............................................................. 38
HIPI (Host Interface—Pixel Interface) ................................... 39
JDATA Interface ......................................................................... 40
Outline Dimensions ....................................................................... 41
Ordering Guide .......................................................................... 42
4/08—Rev. 0 to Rev. A
Change to Table 1, Static Current Parameter.................................4
10/06—Revision 0: Initial Version
Rev. B | Page 2 of 44


Features FEATURES Implementation of a JPEG2000-co mpatible video CODEC for video and stil l images through the ADV212 Wavescale v ideo compression/decompression engine I dentical pinout and footprint to the AD V202; and support for all the functiona lity of the ADV202 Power reduction of a t least 30% compared with ADV202 JTAG/b oundary scan support Patented spatial u ltraefficient recursive filtering (SURF ) technology for low power, low cost wa velet-based compression Support for bot h 9/7 and 5/3 wavelet transforms with u p to 5 levels of transform 9/7 wavelet support for tiles up to 1.048 million s amples 5/3 wavelet support for tiles up to 262,144 samples Video interface dir ect support for ITU-R BT.656, SMPTE 125 M PAL/NTSC, SMPTE 274M, SMPTE 293M (525 p), and ITU-R BT.1358 (625p) or any vid eo format with a maximum input rate of 65 MSPS for irreversible mode or 40 MSP S for reversible mode Programmable tile /image size with widths of up to 4096 p ixels in single-component mode; maximum tile/image height of 40.
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