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LC723482W Dataheets PDF



Part Number LC723482W
Manufacturers Sanyo Semicon Device
Logo Sanyo Semicon Device
Description (LC723481W - LC723483W) Low-Voltage ETR-Controller
Datasheet LC723482W DatasheetLC723482W Datasheet (PDF)

www.DataSheet4U.com Ordering number : ENN7253 CMOS IC LC723481W,723482W,723483W Low-Voltage ETR-Controller Overview The LC723481W, 723482W, and 723483W are lowvoltage electronic tuning radio microcontrollers that include a PLL that operates up to 250 MHz and a 1/4 duty 1/2 bias LCD driver on chip. These ICs include an on-chip DC-DC converter, making it is easy to create the supply voltages required for tuning and allowing cost reductions in end products. These ICs are optimal for use in low-.

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www.DataSheet4U.com Ordering number : ENN7253 CMOS IC LC723481W,723482W,723483W Low-Voltage ETR-Controller Overview The LC723481W, 723482W, and 723483W are lowvoltage electronic tuning radio microcontrollers that include a PLL that operates up to 250 MHz and a 1/4 duty 1/2 bias LCD driver on chip. These ICs include an on-chip DC-DC converter, making it is easy to create the supply voltages required for tuning and allowing cost reductions in end products. These ICs are optimal for use in low-voltage portable audio equipment that includes a radio receiver. Package Dimensions unit: mm 3190A-SQFP64 [LC723481W/2W/3W] 0.5 12.0 10.0 48 49 33 32 Function • Program memory (ROM): — 2048 × 16 bits (4K bytes) LC723481W — 3072 × 16 bits (6K bytes) LC723482W — 4096 × 16 bits (8K bytes) LC723483W • Data memory (RAM): — 128 × 4 bits LC723481W — 192 × 4 bits LC723482W — 256 × 4 bits LC723483W • Cycle time: 40 µs (all 1-word instructions) at 75kHz crystal oscillation • Stack: 4 levels (8 levels) LC723481W(LC723482W/3W) • LCD driver: 48 to 80 segments (1/4 duty, 1/2 bias drive) • Interrupts: One external interrupt Timer interrupts (1, 5, 10, and 50 ms) • A/D converter: Three input channels (5-bit successive approximation conversion) • Input ports: 7 ports (of which 3 can be switched for use as A/D converter inputs) • Output ports: 6 ports (of which 1 can be switched for use as the beep tone output and 2 are opendrain ports) Continued on next page. 64 1 (0.5) (1.25) (1.5) 17 16 0.18 0.15 1.7max 0.1 10.0 12.0 SANYO: SQFP64 Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN N2002RM (OT) No. 7253-1/15 LC723481W/2W/3W Continued from preceding page. • • • • • • • • • I/O ports: 16 pins (Of these 8 can be switched over to function as LCD ports as a mask options.) PLL: Dead band control is supported. (Four types) Reference frequencies: 1, 3, 3.125, 5, 6.25, 12.5, and 25 kHz Input frequencies: FM band: 10 to 250 MHz AM band: 0.5 to 40 MHz Input sensitivity: FM band: 35 mVrms (50 mVrms at 130 MHz or higher frequency) AM band: 35 mVrms IF counting: Using the HCTR input pin for 0.4 to 12 MHz signals External reset input: During CPU and PLL operations, instruction execution is started from location 0. Built-in power-on reset circuit: The CPU starts execution from location 0 when power is first applied. Halt mode: The controller-operating clock is stopped. Backup mode: The crystal oscillator is stopped. Static power-on function: Backup state is cleared with the PF port • Beep tone: 1.5625 and 3.125 kHz • Built-in low-pass filter amplifier: This circuit obviates the need for an external amplifier for the PLL circuit and contributes to reduced end product costs. • Built-in DC/DC converter: Cost reduced in tuner-use power supply circuit • Memory retention voltage: 0.9 V at least • VDD voltage — PLL: 1.8 to 3.6 V — CPU: 1.4 to 3.6 V — ADC: 1.6 to 3.6 V • Optional function switches: — PH0 to PH3/S13 to S16 — PG0 to PG3/S17 to S20 — PG0 to PG3 (open-drain output/general-purpose output) — PH0 to PH3 (open-drain output/general-purpose output) — FM DC/DC clock (75 kHz or 1/256 times the local FM oscillator frequency) — AM DC/DC clock (1/2, 1/4, 1/8, or 1/16 times the AM local oscillator frequency) • Package: SQFP-64 (0.5-mm pitch) Pin Assignment 63 TEST1 62 AOUT 55 HCTR 54 BRES 53 DBR1 52 DBR2 51 DBR3 50 DBR4 58 AMIN 57 FMIN 56 VDD 59 VSS 64 XIN 61 AIN 60 EO 49 TU XOUT TEST2 PA3 PA2 PA1 PA0 PB3 PB2 PB1 PB0 PC3 PC2 PC1 PC0 PD3 PD2 1 2 3 4 5 6 7 8 9 10 11 General-purpose I/O, open drain outputs, segment outputs General-purpose I/O General-purpose I/O, open drain outputs, segment outputs General-purpose inputs/ A/D converter inputs General-purpose unbalanced outputs Open drain outputs General-purpose inputs 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 COM1 COM2 COM3 COM4 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 12 13 Open drain outputs 14 15 16 Generalpurpose I/O 28 29 30 S15/PH2 17 18 19 20 21 22 23 24 25 26 INT/PD0 PD2 PE1 BEEP/PE0 ADI3/PF2 ADI1/PF1 ADI0/PF0 S20/PG3 S19/PG2 S18/PG1 27 S17/PG0 S16/PH3 S14/PH1 31 S13/PH0 VSS No. 7253-2/15 LC723.


LC723481W LC723482W LC723483W


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