ADP3192 Controller Datasheet

ADP3192 Datasheet PDF, Equivalent


Part Number

ADP3192

Description

8-Bit Programmable 2- to 4-Phase Synchronous Buck Controller

Manufacture

Analog Devices

Total Page 30 Pages
Datasheet
Download ADP3192 Datasheet


ADP3192
www.DataSheet4U.com
8-Bit Programmable 2- to 4-Phase
Synchronous Buck Controller
ADP3192
FEATURES
Selectable 2-, 3-, or 4-phase operation at up to
1 MHz per phase
±7.7 mV worst-case differential sensing error over
temperature
Logic-level PWM outputs for interface to external high
power drivers
Enhanced PWM flex mode for excellent load transient
performance
Active current balancing between all output phases
Built-in power-good/crowbar blanking supports on-the-fly
VID code changes
Digitally programmable 0.5 V to 1.6 V output supports both
VR10.x and VR11 specifications
Programmable short-circuit protection with programmable
latch-off delay
APPLICATIONS
Desktop PC power supplies for
Next generation Intel® processors
VRM modules
GENERAL DESCRIPTION
The ADP31921 is a highly efficient, multiphase, synchronous buck
switching regulator controller optimized for converting a 12 V
main supply into the core supply voltage required by high per-
formance Intel processors. It uses an internal 8-bit DAC to read
a voltage identification (VID) code directly from the processor,
which is used to set the output voltage between 0.5 V and 1.6 V.
This device uses a multimode PWM architecture to drive the
logic-level outputs at a programmable switching frequency that
can be optimized for VR size and efficiency. The phase relation-
ship of the output signals can be programmed to provide 2-, 3-,
or 4-phase operation, allowing for the construction of up to
four complementary buck switching stages.
The ADP3192 also includes programmable no load offset and
slope functions to adjust the output voltage as a function of the
load current, optimally positioning it for a system transient. The
ADP3192 also provides accurate and reliable short-circuit
protection, adjustable current limiting, and a delayed power-
good output that accommodates on-the-fly output voltage
changes requested by the CPU.
FUNCTIONAL BLOCK DIAGRAM
GND 18
VCC
31
SHUNT
REGULATOR
UVLO
SHUTDOWN
850mV –
EN 1
+
DAC
+ 150mV
CSREF
+
+
DAC –
– 350mV
PWRGD 2
DELAY
TTSENSE 10
VRHOT 9
VRFAN 8
THERMAL
THROTTLING
CONTROL
RT RAMPADJ
12 13
OSCILLATOR
19 OD
+
CMP
+
CMP
+
CMP
+
CMP
SET EN
RESET
30 PWM1
RESET
29 PWM2
RESET
28 PWM3
2/3/4-PHASE
DRIVER LOGIC 27 PWM4
RESET
CROWBAR
CURRENT
LIMIT
25 SW1
24 SW2
23 SW3
22 SW4
ILIMIT 11
DELAY 7
17 CSCOMP
CURRENT
MEASUREMENT
+
15 CSREF
AND LIMIT
16 CSSUM
21 IMON
IREF 20
COMP 5
4 FB
FBRTN 3
PRECISION
REFERENCE
VIDSEL 40
VID DAC
32 33 34 35 36 37 38 39
VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0
BOOT
VOLTAGE
AND
SOFT START
CONTROL
14 LLSET
6 SS
ADP3192
Figure 1.
The ADP3192 has a built-in shunt regulator that allows the part
to be connected to the 12 V system supply through a series resistor.
The ADP3192 is specified over the extended commercial
temperature range of 0°C to 85°C and is available in a
40-lead LFCSP.
1 Protected by U.S. Patent Number 6,683,441; other patents pending.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.

ADP3192
ADP3192
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Test Circuits....................................................................................... 5
Absolute Maximum Ratings............................................................ 6
ESD Caution.................................................................................. 6
Pin Configuration and Function Descriptions............................. 7
Typical Performance Characteristics ............................................. 9
Theory of Operation ...................................................................... 10
Start-Up Sequence...................................................................... 10
Phase Detection Sequence......................................................... 10
Master Clock Frequency............................................................ 11
Output Voltage Differential Sensing ........................................ 11
Output Current Sensing ............................................................ 11
Active Impedance Control Mode............................................. 11
Current Control Mode and Thermal Balance ........................ 11
Voltage Control Mode................................................................ 12
Current Reference ...................................................................... 12
Enhanced PWM Mode .............................................................. 12
Delay Timer................................................................................. 12
Soft Start ...................................................................................... 12
Current-Limit, Short-Circuit, and Latch-Off Protection...... 13
Dynamic VID.............................................................................. 13
REVISION HISTORY
6/06—Revision 0: Initial Version
Power-Good Monitoring........................................................... 14
Output Crowbar ......................................................................... 14
Output Enable and UVLO ........................................................ 14
Thermal Monitoring .................................................................. 14
Application Information................................................................ 20
Setting the Clock Frequency..................................................... 20
Soft Start Delay Time................................................................. 20
Current-Limit Latch-Off Delay Times .................................... 20
Inductor Selection ...................................................................... 21
Current Sense Amplifier............................................................ 22
Inductor DCR Temperature Correction ................................. 22
Output Offset .............................................................................. 24
COUT Selection ............................................................................. 24
Power MOSFETs......................................................................... 25
Ramp Resistor Selection............................................................ 26
COMP Pin Ramp ....................................................................... 26
Current-Limit Setpoint.............................................................. 26
Feedback Loop Compensation Design.................................... 27
CIN Selection and Input Current di/dt Reduction.................. 28
Thermal Monitor Design .......................................................... 28
Shunt Resistor Design................................................................ 29
Tuning the ADP3192 ................................................................. 29
Layout and Component Placement ......................................... 31
Outline Dimensions ....................................................................... 32
Ordering Guide .......................................................................... 32
Rev. 0 | Page 2 of 32


Features www.DataSheet4U.com 8-Bit Programmable 2- to 4-Phase Synchronous Buck Controll er ADP3192 FEATURES Selectable 2-, 3-, or 4-phase operation at up to 1 MHz per phase ±7.7 mV worst-case differential sensing error over temperature Logic-l evel PWM outputs for interface to exter nal high power drivers Enhanced PWM fle x mode for excellent load transient per formance Active current balancing betwe en all output phases Built-in power-goo d/crowbar blanking supports on-the-fly VID code changes Digitally programmable 0.5 V to 1.6 V output supports both VR 10.x and VR11 specifications Programmab le short-circuit protection with progra mmable latch-off delay FUNCTIONAL BLOC K DIAGRAM VCC 31 RT RAMPADJ 12 13 SHU NT REGULATOR UVLO SHUTDOWN GND 18 850mV EN 1 OSCILLATOR + – 19 OD CMP – + DAC + 150mV CSREF DAC – 350mV + – + SET EN RESET RESET 30 PWM1 29 PWM2 CURRENT BALANCING CIRCUIT CMP + CMP – + CMP – + 28 PWM3 RESET 2/3/4-PHASE DRIVER LOGIC 27 PWM4 RESET PWRGD 2 DELAY CROWBAR CURRENT .
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