IDT70T15

www.DataSheet4U.com HIGH-SPEED 2.5V 16/8K X 9 DUAL-PORT STATIC RAM .eatures x x PRELIMINARY IDT70T16/5L x True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Commercial:20/25ns (max.) – Industrial: 25ns (max.) Low-power operation – IDT70T16/5L Active: 200mW (typ.) Standby: 600µW (typ.) x IDT70T16/5 easily expands data bus width to 18 bits or more using the Master/Slave select when cascading more than one device x x x x x x x x M/S = VIH for BUSY output flag on Master M/S = VIL for BUSY input on Slave Busy and Interrupt Flag On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port LVTTL-compatible, single 2.5V (±100mV) power supply Available in an 80-pin TQFP and 100-pin fpBGA Industrial temperature range (–40°C to +85°C) is available for selected speeds .unctional Block Diagram OEL CEL R/WL OER CER R/WR I/O0L- I/O8L I/O Control BUSYL (2,3) I/O0R-I/O8R I/O Control BUSYR(2,3) Address Decoder 14 A13L(1) A0L MEMORY ARRAY 14 Address Decoder A13R(1) A0R CEL OEL R/WL SEML (3) INTL NOTES: 1. A 13 is a NC for IDT70T15. 2. (MASTER): BUSY is output; (SLAVE): BUSY is input. 3. BUSY outputs and INT outputs are non-tri-stated push-pull drivers. ARBITRATION INTERRUPT SEMAPHORE LOGIC CER OER R/WR M/S SEMR (3) INTR 5663 drw 01 AUGUST 2002 1 ©2002 Integrated Device Technology, Inc. DSC 5663/1 IDT70T16/5L High-Speed 2.5V 16/8K x 9...