Document
Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits
Benefits l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness l Fully Characterized Capacitance and Avalanche
SOA l Enhanced body diode dV/dt and dI/dt Capability
G
PD - 96901C
IRFB3307 IRFS3307 IRFSL3307
HEXFET® Power MOSFET
D VDSS RDS(on) typ. max.
S ID
75V
5.0m: 6.3m:
130A
GDS
TO-220AB IRFB3307
GDS
D2Pak IRFS3307
GDS
TO-262 IRFSL3307
Absolute Maximum Ratings
Symbol
Parameter
ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C
Continuous Drain Current, VGS @ 10V
dContinuous Drain Current, VGS @ 10V
Pulsed Drain Current Maximum Power Dissipation
Linear Derating Factor
VGS dv/dt
Gate-to-Source Voltage
fPeak Diode Recovery
TJ TSTG
Operating Junction and Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Avalanche Characteristics
eEAS (Thermally limited) Single Pulse Avalanche Energy ÃIAR Avalanche Current gEAR Repetitive Avalanche Energy
Thermal Resistance
Symbol RθJC
Parameter
kJunction-to-Case
RθCS RθJA RθJA
Case-to-Sink, Flat Greased Surface , TO-220
kJunction-to-Ambient, TO-220 jkJunction-to-Ambient (PCB Mount) , D2Pak
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Max.
130 91
510 250 1.6 ± 20 11 -55 to + 175
300
x x10lb in (1.1N m)
270 See Fig. 14, 15, 16a, 16b
Typ. ––– 0.50 ––– –––
Max. 0.61 ––– 62 40
Units A
W W/°C
V V/ns °C
mJ A mJ
Units °C/W
1
01/20/06
IRFB3307/IRFS3307/IRFSL3307
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) IDSS
Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current
IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage
RG Gate Input Resistance
75 ––– ––– ––– 0.069 ––– ––– 5.0 6.3
V VGS = 0V, ID = 250µA
dV/°C Reference to 25°C, ID = 1mA gmΩ VGS = 10V, ID = 75A
2.0 ––– 4.0 V VDS = VGS, ID = 150µA
––– ––– 20 µA VDS = 75V, VGS = 0V
––– ––– 250
VDS = 75V, VGS = 0V, TJ = 125°C
––– ––– 200 nA VGS = 20V
––– ––– -200
VGS = -20V
––– 1.5 ––– Ω f = 1MHz, open drain
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR)
Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance (Energy Related)
hEffective Output Capacitance (Time Related)
98 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– –––
––– 120 35 46 26 120 51 63 5150 460 250 570 700
––– 180 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– –––
S VDS = 50V, ID = 75A nC ID = 75A
gVDS = 60V
VGS = 10V ns VDD = 48V
ID = 75A
gRG = 3.9Ω
VGS = 10V pF VGS = 0V
VDS = 50V ƒ = 1.0MHz
iVGS = 0V, VDS = 0V to 60V , See Fig.11 hVGS = 0V, VDS = 0V to 60V , See Fig. 5
Diode Characteristics
Symbol
Parameter
IS Continuous Source Current
(Body Diode)
ISM Pulsed Source Current
Ãd(Body Diode)
VSD Diode Forward Voltage
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
IRRM Reverse Recovery Current ton Forward Turn-On Time
Min. Typ. Max. Units
Conditions
––– ––– 130 A MOSFET symbol
D
––– ––– 510
showing the A integral reverse
G
––– ––– 1.3
p-n junction diode.
gV TJ = 25°C, IS = 75A, VGS = 0V
S
––– 38 57 ns TJ = 25°C
VR = 64V,
––– 46 69
TJ = 125°C
––– 65 98 nC TJ = 25°C
gIF = 75A
di/dt = 100A/µs
––– 86 130
TJ = 125°C
––– 2.8 ––– A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Calculated continuous current based on maximum allowable junction Coss eff. (TR) is a fixed capacitance that gives the same charging time
temperature. Package limitation current is 75A. Repetitive rating; pulse width limited by max. junction
temperature. Limited by TJmax, starting TJ = 25°C, L = 0.096mH
RG = 25Ω, IAS = 75A, VGS =10V. Part not recommended for use above this value. ISD ≤ 75A, di/dt ≤ 530A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
as Coss while VDS is rising from 0 to 80% VDSS. Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS. When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994. Rθ is measured at TJ approximately 90°C.
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ID, Drain-to-Source Current (A)
1000 100 10
TOP BOTTOM
VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V
1
0.1
0.01 0.1
4.5V
≤60µs PULSE WIDTH Tj = 25°C
1 10 100 VDS, Drain-to-Source Voltage (V)
1000
Fig 1. Typical Output Characteristics
1000
ID, Drain-to-Source Current (Α)
100 TJ = 175°C
10 TJ = 25°C
1
0.1.