A43L1616 DRAM Datasheet

A43L1616 Datasheet PDF, Equivalent


Part Number

A43L1616

Description

1M X 16 Bit X 2 Banks Synchronous DRAM

Manufacture

AMIC Technology

Total Page 30 Pages
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A43L1616
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A43L1616
Preliminary
1M X 16 Bit X 2 Banks Synchronous DRAM
Document Title
1M X 16 Bit X 2 Banks Synchronous DRAM
Revision History
Rev. No. History
0.0 Initial issue
Issue Date
August 2, 2005
Remark
Preliminary
PRELIMINARY (August, 2005, Version 0.0)
AMIC Technology, Corp.

A43L1616
A43L1616
Preliminary
1M X 16 Bit X 2 Banks Synchronous DRAM
Features
Power supply
- VDD: 3.3V VDDQ : 3.3V
LVTTL compatible with multiplexed address
Two banks / Pulse RAS
MRS cycle with address key programs
- CAS Latency (2 & 3)
- Burst Length (1,2,4,8 & full page)
- Burst Type (Sequential & Interleave)
Clock Frequency (max) : 167MHz @ CL=3 (-6)
143MHz @ CL=3 (-7)
All inputs are sampled at the positive going edge of the
system clock
DQM for masking
Auto & self refresh
64ms refresh period (4K cycle)
Industrial operating temperature range: -40ºC to +85ºC
for -U series.
Available in 54-pin TSOP(II) package
Package is available to lead free (-F series)
General Description
The A43L1616 is 33,554,432 bits synchronous high data
rate Dynamic RAM organized as 2 X 1,048,576 words by
16 bits, fabricated with AMIC’s high performance CMOS
technology. Synchronous design allows precise cycle
control with the use of system clock. I/O transactions are
Pin Configuration
54 TSOP (II)
possible on every clock cycle. Range of operating
frequencies, programmable latencies allows the same
device to be useful for a variety of high bandwidth, high
performance memory system applications.
54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28
A43L1616V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
PRELIMINARY (August, 2005, Version 0.0)
1
AMIC Technology, Corp.


Features www.DataSheet4U.com A43L1616 Preliminar y Document Title 1M X 16 Bit X 2 Banks Synchronous DRAM Revision History Rev. No. 0.0 1M X 16 Bit X 2 Banks Synchron ous DRAM History Initial issue Issue Date August 2, 2005 Remark Preliminary PRELIMINARY (August, 2005, Version 0 .0) AMIC Technology, Corp. A43L1616 P reliminary Features Power supply - VDD: 3.3V VDDQ : 3.3V LVTTL compatible with multiplexed address Two banks / Pulse RAS MRS cycle with address key programs - CAS Latency (2 & 3) - Burst Length ( 1,2,4,8 & full page) - Burst Type (Sequ ential & Interleave) Clock Frequency (m ax) : 167MHz @ CL=3 (-6) 143MHz @ CL=3 (-7) 1M X 16 Bit X 2 Banks Synchronous DRAM All inputs are sampled at the po sitive going edge of the system clock D QM for masking Auto & self refresh 64ms refresh period (4K cycle) Industrial o perating temperature range: -40ºC to + 85ºC for -U series. Available in 54-pi n TSOP(II) package Package is available to lead free (-F series) General Description The A43L1616 is 33.
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