1M X 16 Bit X 4 Banks Synchronous DRAM
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A43L2616A
Preliminary
Document Title 1M X 16 Bit X 4 Banks Synchronous DRAM Revision History
Rev. N...
Description
www.DataSheet4U.com
A43L2616A
Preliminary
Document Title 1M X 16 Bit X 4 Banks Synchronous DRAM Revision History
Rev. No.
0.0
1M X 16 Bit X 4 Banks Synchronous DRAM
History
Initial issue
Issue Date
November 30, 2004
Remark
Preliminary
PRELIMINARY
(November, 2004, Version 0.0)
AMIC Technology, Corp.
A43L2616A
Preliminary
Feature
JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks / Pulse RAS MRS cycle with address key programs - CAS Latency (2,3) - Burst Length (1,2,4,8 & full page) - Burst Type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock Clock Frequency: 166MHz @ CL=3 143MHz @ CL=3
1M X 16 Bit X 4 Banks Synchronous DRAM
Burst Read Single-bit Write operation DQM for masking Auto & self refresh 64ms refresh period (4K cycle) Commercial Temperature Operation : 0°C~70°C Industrial Temperature Operation : -40 ° C~85 ° C for –U grade 54 Pin TSOP (II) and 54 Balls CSP (8mm x 8mm)
General Description
The A43L2616A is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 X 1,048,576 words by 16 bits, fabricated with AMIC’s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable latencies allows the same device to be useful for a variety of high bandwidth, high performance memory system applications.
Pin Configuration
TSOP...
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