54F379

www.DataSheet4U.com 54F 74F379 Quad Parallel Register with Enable August 1995 54F 74F379 Quad Parallel Register with Enable General Description The ’F379 is a 4-bit register with buffered common Enable This device is similar to the ’F175 but features the common Enable rather than common Master Reset Features Y Y Y Y Y Edge triggered D-type inputs Buffered positive edge-triggered clock Buffered common enable input True and complement outputs Guaranteed 4000V minimum ESD protection Commercial 74F379PC Military Package Number N16E Package Description 16-Lead (0 300 Wide) Molded Dual-In-Line 16-Lead Ceramic Dual-In-Line 16-Lead (0 300 Wide) Molded Small Outline JEDEC 16-Lead (0 300 Wide) Molded Small Outline EIAJ 16-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C 54F379DM (QB) 74F379SC (Note 1) 74F379SJ (Note 1) 54F379FM (QB) 54F379LM (QB) J16A M16A M16D W16A E20A Note 1 Devices also available in 13 reel Use suffix e SCX and SJX Logic Symbols IEEE IEC Connection Diagrams Pin Assignment DIP SOIC and Flatpak Pin Assignment for LCC TL F 9527 – 1 TL F 9527 – 2 TL F 9527–5 TL F 9527–3 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9527 RRD-B30M115 Printed in U S A Unit Loading Fan Out 54F 74F Pin Names Description UL Input IIH IIL HIGH LOW Output IOH IOL 10 10 10 10 10 10 50 33 3 50 33 3 20 mA b0 6 mA 20 mA b0 6 mA 20 mA b0 6 mA b 1 mA 20 mA b 1 mA 20 mA E D 0 – D3 CP Q0 – Q3 Q0 – Q3 ...