CLASS_D AMPLIFIERS. AN1013 Datasheet
MONO CLASS_D AMPLIFIERS
|Total Page||13 Pages|
MONO CLASS_D AMPLIFIERS
by M. Masini, L. Pagotto
The TDA7480/81/82 are single ended , split supply, class_D amplifiers. The output of the amplifier is a
high frequency square wave (around 100Khz), rail to rail, with variable duty cycle.
The audio information is the average value of the output square wave.
To obtain the audio signal, the output must be low pass filtered.
The main issue of this amplifier is the very low dissipated power (the very high efficiency) compared to a
normal class AB amplifier.
The preamplifier provides the voltage gain of the overall amplifier. The second stage is the power stage,
with a gain 1.5, that is the high efficiency class_D amplifier.
The class_D amplifier stage is done with a multivibrator : with no signal it generates a 50% duty cycle
square wave, with signal applied, it changes the duty cycle.
The switching frequency is set by the voltage on pin 9 (DIP20) or pin 6 (MW15).
The output power stage is done with N-ch DMOS power with the upper one supplied by a bootstrap ca-
pacitor (C11 in the application circuit).
1. CRITICAL COMPONENTS IN THE APPLICATION
A: Bypass high frequency filtering capacitor on supply
The most important filter capacitor is C5 (see application circuit) between pin 13/14 for MW15 package
or pin 16/17 for DIP20 package.
The value of the parasitic inductance between this capacitance and the IC pins is related to the ampli-
tude of the spikes on the power supply pins at every commutations of the output.
In fact, for any commutation, there is an abrupt variation of the current in the parasitic inductances Lpar
in series to the supply. This abrupt variation increases as the output current increases and can be typi-
cally of some amperes on 10ns. With this slew rate of the current, also an inductance of about some the
of nH (i.e. the lead inductance of the pin) generates voltage spikes of some volts.
Figure 1. Block Diagram
AN1013 APPLICATION NOTE
- The effects of these spikes are:
Distortion / offset increase due to non linear coupling on internal elementary devices in signal circuit
- Overvoltage on the IC
- Strong noise on logic signal inside the chip, with the possibility of incertain logic levels dangerousfor the IC.
To avoid this spikes generation it is mandatory to put the bypass capacitor at a distance much lower
than 0.5cm from the IC pins. It is important, of course, the quality of the capacitor itself too.
- Other high frequency bypass capacitors that are important for the correct behaviour of the IC are
C8 (MW15: pin6/8; DIP20: pin 9/1..3,18..20):
Again it is important the low inductance and the nearness to the IC pins.
The voltage on this pin sets the switching frequency of the IC.
The purpose of this capacitor is to filter the high frequency noise that can enter in the IC by pin 6 in
MW15 or pin9 in DIP20. This high frequency noise can generate distortion/offset.
The maximum value of the capacitance that can be used, without switching frequency falls down for high
frequency input signal (max 20Khz), can be calculated with this relation:
This means that C8 can be calculated as:
For example if R4=12KΩ [ switching frequency ~ 120Khz] --> C8(max) = 330pF
We suggest C8=280pF.
C4 (MW15:pin5; DIP20 pin 8):
This capacitor sets the bandwidth of the class-D amplifier [see section no.6 ].
It is important that the reference ground of this capacitor is as near as possible to the IC signal ground.
C3 (MW15 pin 9; DIP20 pin 11):
This capacitor filters the high frequency noise that can enter in the input and that can cause intermodula-
tion aliasing noise at the output.
In fact no signal at frequency greater than half of the switching frequency can enter in the IC without
generate aliasing noise
|Features||Datasheet pdf www.DataSheet4U.com AN1013 APPLICATION NOTE MONO CLASS_D AMPLIFIERS by M. Masi ni, L. Pagotto INTRODUCTION The TDA748 0/81/82 are single ended , split supply , class_D amplifiers. The output of the amplifier is a high frequency square w ave (around 100Khz), rail to rail, with variable duty cycle. The audio informa tion is the average value of the output square wave. To obtain the audio signa l, the output must be low pass filtered . The main issue of this amplifier is t he very low dissipated power (the very high efficiency) compared to a normal c lass AB amplifier. The preamplifier pro vides the voltage gain of the overall a mplifier. The second stage is the power stage, with a gain 1.5, that is the hi gh efficiency class_D amplifier. The cl ass_D amplifier stage is done with a mu ltivibrator : with no signal it generat es a 50% duty cycle square wave, with s ignal applied, it changes the duty cycl e. The switching frequency is set by th e voltage on pin 9 (DIP20) or pin 6 (MW15). The output power st.|
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