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19-3954; Rev 0; 1/06
21-Bit Deserializers with Programmable Spread Spectrum and DC Balance
General Description
The MAX9242/MAX9244/MAX9246 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/ LVTTL outputs. A separate parallel-rate LVDS clock provides the timing for deserialization. The MAX9242/ MAX9244/MAX9246 feature...