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74AUP2G38 Datasheet, Equivalent, NAND Gate.

Low Power Dual 2-Input NAND Gate

Low Power Dual 2-Input NAND Gate

 

 

 

Part 74AUP2G38
Description Low Power Dual 2-Input NAND Gate
Feature www.DataSheet4U.com 74AUP2G38 Low-power dual 2-input NAND gate (open-drain) Re v. 01 — 16 October 2006 Product data sheet 1. General description The 74AUP 2G38 is a high-performance, low-power, low-voltage, Si-gate CMOS device, super ior to most advanced CMOS compatible TT L families. Schmitt trigger action at a ll inputs makes the circuit tolerant to slower input rise and fall times acros s the entire VCC range from 0.8 V to 3. 6 V. This device ensures a very low sta tic and dynamic power consumption acros s the entire VCC range from 0.8 V to 3. 6 V. This device is fully specified fo r partial Power-do .
Manufacture NXP
Datasheet
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Part 74AUP2G38
Description Low Power Dual 2-Input NAND Gate
Feature www.DataSheet4U.com 74AUP2G38 Low-power dual 2-input NAND gate (open-drain) Re v. 01 — 16 October 2006 Product data sheet 1. General description The 74AUP 2G38 is a high-performance, low-power, low-voltage, Si-gate CMOS device, super ior to most advanced CMOS compatible TT L families. Schmitt trigger action at a ll inputs makes the circuit tolerant to slower input rise and fall times acros s the entire VCC range from 0.8 V to 3. 6 V. This device ensures a very low sta tic and dynamic power consumption acros s the entire VCC range from 0.8 V to 3. 6 V. This device is fully specified fo r partial Power-do .
Manufacture NXP
Datasheet
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74AUP2G38

74AUP2G38
74AUP2G38

74AUP2G38

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