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74AUP1G332 Datasheet, Equivalent, OR Gate.Low Power 3-Input OR Gate Low Power 3-Input OR Gate |
| Part | 74AUP1G332 |
|---|---|
| Description | Low Power 3-Input OR Gate |
| Feature | www. DataSheet4U. com 74AUP1G332 Low-powe r 3-input OR gate Rev. 01 — 13 Novemb er 2006 Product data sheet 1. General description The 74AUP1G332 is a high-pe rformance, low-power, low-voltage, Si-g ate CMOS device, superior to most advan ced CMOS compatible TTL families. Schmi tt trigger action at all inputs makes t he circuit tolerant to slower input ris e and fall times across the entire VCC range from 0. 8 V to 3. 6 V. This device ensures a very low static and dynamic p ower consumption across the entire VCC range from 0. 8 V to 3. 6 V. This device is fully specified for partial power-d own applications u . |
| Manufacture | NXP |
| Datasheet |
| Part | 74AUP1G332 |
|---|---|
| Description | Low Power 3-Input OR Gate |
| Feature | www. DataSheet4U. com 74AUP1G332 Low-powe r 3-input OR gate Rev. 01 — 13 Novemb er 2006 Product data sheet 1. General description The 74AUP1G332 is a high-pe rformance, low-power, low-voltage, Si-g ate CMOS device, superior to most advan ced CMOS compatible TTL families. Schmi tt trigger action at all inputs makes t he circuit tolerant to slower input ris e and fall times across the entire VCC range from 0. 8 V to 3. 6 V. This device ensures a very low static and dynamic p ower consumption across the entire VCC range from 0. 8 V to 3. 6 V. This device is fully specified for partial power-d own applications u . |
| Manufacture | NXP |
| Datasheet |
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