AT89C51RE2

Features 80C52 Compatible – 8051 Instruction Compatible – Four 8-bit I/O Ports (44 Pins Version) – Three 16-bit Timer/Counters – 256 bytes Scratch Pad RAM – 11 Interrupt Sources With 4 Priority Levels ISP (In-System Programming) Using Standard VCC Power Supply Integrated Power Monitor (POR/PFD) to Supervise Internal Power Supply Boot ROM Contains Serial Loader for In-System Programming High-speed Architecture – In Standard Mode: 40 MHz (Vcc 2.7V to 5.5V, Both Internal and External Code Execution) 60 MHz (Vcc 4.5V to 5.5V and Internal Code Execution Only) – In X2 Mode (6 Clocks/Machine Cycle) 20 MHz (Vcc 2.7V to 5.5V, Both Internal and External Code Execution) 30 MHz (Vcc 4.5V to 5.5V and Internal Code Execution Only) 128K bytes On-chip Flash Program/Data Memory – 128 bytes Page Write with auto-erase – 100k Write Cycles On-chip 8192 bytes Expanded RAM (XRAM) – Software Selectable Size (0, 256, 512, 768, 1024, 1792, 2048, 4096, 8192 bytes) Dual Data Pointer Extended stack pointer to 512 bytes Variable Length MOVX for Slow RAM/Peripherals Improved X2 Mode with Independant Selection for CPU and Each Peripheral Keyboard Interrupt Interface on Port 1 SPI Interface (Master/Slave Mode) 8-bit Clock Prescaler Programmable Counter Array with: – High Speed Output – Compare/Capture – Pulse Width Modulator – Watchdog Timer Capabilities Asynchronous Port Reset Two Full Duplex Enhanced UART with Dedicated Internal Baud Rate Generator Low EMI (inhibit ALE) ...