CY7B9950

www.DataSheet4U.com RoboClock CY7B9950 2.5/3.3V, 200-MHz High-Speed Multi-Phase PLL Clock Buffer Features 2.5V or 3.3V operation Split output bank power supplies Output frequency range: 6 MHz to 200 MHz Output-output skew < 100 ps Cycle-cycle jitter < 100 ps ± 2% max output duty cycle Selectable output drive strength Selectable positive or negative edge synchronization Eight LVTTL outputs driving 50Ω terminated lines LVCMOS/LVTTL over-voltage-tolerant reference input Phase adjustments in 625-/1250-ps steps up to +7.5 ns 2x, 4x multiply and (1/2)x, (1/4)x divide ratios Spread-Spectrum-compatible Industrial temp. range: –40°C to +85°C 32-pin TQFP package Description The CY7B9950 RoboClock is a low-voltage, low-power, eight-output, 200-MHz clock driver. It features output phase programmability which is necessary to optimize the timing of high-performance computer and communication systems. The user can program the phase of the output banks through nF[0:1] pins. The adjustable phase feature allows the user to skew the outputs to lead or lag the reference clock. Any one of the outputs can be connected to feedback input to achieve different reference frequency multiplication and divide ratios and zero input-output delay. The device also features split output bank power supplies which enable the user to run two banks (1Qn and 2Qn) at a power supply level different from that of the other two banks (3Qn and 4Qn). Additionally, the three-level PE/HD p...