ZL38004

www.DataSheet4U.com ZL38004 Dedicated Voice Processor with Dual Channel Codec Data Sheet A full Design Manual is available to qualified customers. To register, please send an email to VoiceProcessing@Zarlink.com. June 2006 Ordering Information ZL38004QCG1 100 Pin LQFP *Pb Free Matte Tin - 40°C to +85° C Trays, Bake & Drypack Features 100 MHz (200 MIPs) Zarlink voice processor with Butterfly hardware accelerator and breakpoint/interrupt controller On-board Data (26 Kbytes), Instruction (24 Kbytes RAM and Boot (3 Kbytes) ROM Dual ∆Σ ADCs with input buffer gain selection programmable to either 8 or 16 kHz sampling Dual ∆Σ DACs with output sampling of 8, 16, 44.1 and 48 kHz and internal output driver 2048 tap Filter co-processor shared across up to 16 separate functions in 128 tap increments Dual function Inter-IC Sound (I2S) or Secondary TDM port Primary PCM port supports TDM (ST BUS, GCI or McBSP framing) or SSI modes at bit rates of 128, 256, 512, 1024, 2048, 4096, 8192 or 16384 Kb/sec Separate slave (microcontroller) and master (Flash) SPI ports, maximum clock rate = 25 MHz Watchdog and 2 auxiliary timers 11 General Purpose Input/Output (GPIO) pins General purpose UART port Bootloadable for future Zarlink software upgrades External oscillator or crystal/ceramic resonator 1.2 V Core; 3.3 V IO with 5 V-tolerant inputs IEEE-1149.1 compatible JTAG port Buffer CODEC[0] ADC DAC Driver Buffer ADC DAC Driver 5 / IRQ IRQ IRQ IRQ[15:0] 100 MHz MCL...