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Am29PDL127H
Data Sheet
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For More Information
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Publication Number 26864 Revision A
Amendment +4 Issue Date June 30, 2003
THIS PAGE LEFT INTENTIONALLY BLANK.
ADVANCE INFORMATION
Am29PDL127H
128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Page Mode Simultaneous Read/Write Flash Memory with Enhanced VersatileIOTM Control
DISTINCTIVE CHARACTERISTICS
ARCHITECTURAL ADVANTAGES
■ 128 Mbit Page Mode device
— Page size of 8 words: Fast page read access from random locations within the page
SOFTWARE FEATURES
■ Software command-set compatible with JEDEC 42.4 standard
— Backward compatible with Am29F and Am29LV families
■ Single power supply operation
— Full Voltage range: 2.7 to 3.6 volt read, erase, and program operations for battery-powered applications
■ CFI (Common Flash Interface) complaint
— Provides device-specific information to the system, allowing host software to easily reconfigure for different Flash devices
■ Simultaneous Read/Write Operation
— Data can be continuously read from one bank while executing erase/program functions in another bank — Zero latency switching from write to read operations
■ Erase Suspend / Erase Resume
— Suspends an erase operation to allow read or program operations in other sectors of same bank
■ Unlock Bypass Program command
— Reduces overall programming time when issuing multiple program command sequences
■ FlexBank Architecture
— 4 separate banks, with up to two simultaneous operations per device — Bank A: 16 Mbit (4 Kw x 8 and 32 Kw x 31) — Bank B: 48 Mbit (32 Kw x 96) — Bank C: 48 Mbit (32 Kw x 96) — Bank D: 16 Mbit (4 Kw x 8 and 32 Kw x 31)
HARDWARE FEATURES
■ Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting program or erase cycle completion
■ Enhanced VersatileI/OTM (VIO) Control
— Output voltage generated and input voltages tolerated on all control inputs and I/Os is determined by the voltage on the VIO pin — VIO options at 1.8 V and 3 V I/O
■ Hardware reset pin (RESET#)
— Hardware method to reset the device to reading array data
■ WP#/ ACC (Write Protect/Acceleration) input
— At VIL, hardware level protection for the first and last two 4K word sectors. — At VIH, allows removal of sector protection — At VHH, provides accelerated programming in a factory setting
■ SecSiTM (Secured Silicon) Sector region
— Up to 128 words accessible through a command sequence — Up to 64 factory-locked words — Up to 64 customer-lockable words
■ Persistent Sector Protection
— A command sector protection method to lock combinations of individual sectors and sector groups to prevent program or erase operations within that sector — Sectors can be locked and unlocked in-system at VCC level
■ Both top and bottom boot blocks in one device ■ Manufactured on 0.13 µm process technology ■ 20-year data retention at 125°C ■ Minimum 1 million erase cycle guarantee per sector
■ Password Sector Protection
— A sophisticated sector protection method to lock combinations of individual sectors and sector groups to prevent program or erase operations within that sector using a user-defined 64-bit password
PERFORMANCE CHARACTERISTICS
■ High Performance
— Page access times as fast as 20 ns — Random access times as fast as 55 ns
■ Package options
— 64-ball Fortified BGA — 80-ball Fine-pitch BGA — Multi Chip Packages (MCP)
■ Power consumption (typical values at 10 MHz)
— 55 mA active read current — 25 mA program/erase current — 1 µA typical standby mode current
This document contains information on a product under development at Advanced Micro Devices. The information is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed product without notice.
Publication# 26864 Rev: A Amendment/+4 Issue Date: June 30, 2003
A D V A N C E
I N F O R M A T I O N
GENERAL DESCRIPTION
The Am29PDL127H is a 128 Mbit, 3.0 volt-only Page Mode and Simultaneous Read/Write Flash memory device organized as 8 Mwords. The devic.