MAX5866

www.DataSheet4U.com 19-3223; Rev 0; 2/04 KIT ATION EVALU E L B A AVAIL Ultra-Low-Power, High-DynamicPerformance, 60Msps Analog Front End General Description Features ♦ Integrated Dual, 8-Bit ADCs and Dual, 10-Bit DACs ♦ Ultra-Low Power 80mW at fCLK = 60MHz (Rx Mode) 52.5mW at fCLK = 60MHz (Tx Mode) Low-Current Idle and Shutdown Modes ♦ Excellent Dynamic Performance 48dB SINAD at fIN = 25MHz (ADC) 64.2dBc SFDR at fOUT = 6MHz (DAC) ♦ Excellent Gain/Phase Match ±0.2° Phase, ±0.05dB Gain at fIN = 25MHz (ADC) ♦ Internal/External Reference Option ♦ +2.7V to +3.3V Digital Output Level (TTL/CMOS Compatible) ♦ Multiplexed Parallel Digital Input/Output for ADCs/DACs ♦ Miniature 48-Pin Thin QFN Package (7mm ✕ 7mm) ♦ Evaluation Kit Available (Order MAX5865EVKIT) MAX5866 The MAX5866 ultra-low-power, highly integrated analog front end is ideal for portable communication equipment such as handsets, PDAs, WLAN, and 3G wireless terminals. The MAX5866 integrates dual, 8-bit receive ADCs and dual, 10-bit transmit DACs while providing the highest dynamic performance at ultra-low power. The ADCs’ analog I-Q input amplifiers are fully differential and accept 1V P-P full-scale signals. Typical I-Q channel phase matching is ±0.2° and amplitude matching is ±0.05dB. The ADCs feature 48dB SINAD and 70.1dBc spurious-free dynamic range (SFDR) at fIN = 25MHz and fCLK = 60MHz. The DACs’ analog I-Q outputs are fully differential with ±400mV full-scale output, and 1.4V common-mode level. Typical I-Q cha...