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Product Specification
PE4231
Product Description
The PE4231 SPDT High Power UltraCMOS™ RF Switch is designed to cover a broad range of applications from DC to 1.3 GHz. This single-supply reflective switch integrates on-board CMOS control logic driven by a simple, single-pin CMOS or TTL compatible control input. Using a nominal +3-volt power supply, a typical input 1 dB compression point of +32 dBm can be achieved. The PE4231 also exhibits input-output isolation of better than 42 dB at 1.0 GHz and is offered in a small 8-lead MSOP package. The PE4231 SPDT High Power UltraCMOS™ RF Switch is manufactured in Peregrine’s patented Ultra Thin Silicon (UTSi®) CMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. Figure 1. Functional Diagram
RFCommon
SPDT High Power UltraCMOS™ DC – 1.3 GHz RF Switch Features • Optimized for 75 Ω systems
• Single +3-volt power supply • Low insertion loss: 0.80 dB at 1.0 GHz • High isolation: 42 dB at 1.0 GHz • Typical input 1 dB compression point of
+32 dBm
• Single-pin CMOS or TTL logic control • Low cost
Figure 2. Package Type
8-lead MSOP
RF1
RF2
CMOS Control Driver
CTRL
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 75 Ω)
Parameter
Operation Frequency Insertion Loss Isolation – RFCommon to RF1/RF2 Isolation – RF1 to RF2 Return Loss ‘ON’ Switching Time ‘OFF’ Switching Time Video Feedthrough
2 3 1
Conditions
50 MHz 1000 MHz 50 MHz 1000 MHz 50 MHz 1000 MHz 1000 MHz CTRL to 0.1 dB final value, 2 GHz CTRL to 25 dB isolation, 2 GHz
Minimum
DC
Typical
0.50
Maximum
1300 0.60 0.90
Units
MHz dB dB dB dB ns ns mVpp dBm dBm
73 40 58 33 16
0.80 75 42 60 35 17 2000 900 15
Input 1 dB Compression Input IP3 Notes:
3
1000 MHz 1000 MHz, 17 dBm
30 50
32
1. Device linearity will begin to degrade below 1 MHz. 2. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth. 3. Measured in a 50 Ω system. ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 7
Document No. 70-0097-01 │ www.psemi.com
PE4231
Product Specification
Figure 3. Pin Configuration (Top View)
Table 4. DC Electrical Specifications
Parameter Min
2.7
Typ
3.0 29
Max
3.3 35
Units
V µA V
VDD CTRL
1 2
8 7
RF1 GND
VDD Power Supply Voltage IDD Power Supply Current (VDD = 3V, VCNTL = 3V) Control Voltage High
4231
GND 3 4 6 5 GND
0.7xVDD 0.3xVDD
Control Voltage Low
RFCommon RF2
V
Table 2. Pin Descriptions
Pin No.
1 2
Table 5. Truth Table
Control Voltage Signal Path
RFCommon to RF1 RFCommon to RF2
Pin Name
VDD CTRL
Description
Nominal +3 V supply connection. CMOS or TTL logic level: High = RFCommon to RF1 signal path Low = RFCommon to RF2 signal path Ground connection. Traces should be physically short and connected to ground Common RF port for switch.1 RF2 port.1 Ground Connection. Traces should be physically short and connected to ground Ground Connection. Traces should be physically short and connected to ground RF1 port.1
CTRL = CMOS or TTL High CTRL = CMOS or TTL Low
3
GND
4 5 6
RF Common RF2 GND
The control logic input pin (CTRL) is typically driven by a 3-volt CMOS logic level signal, and has a threshold of 50% of VDD. For flexibility to support systems that have 5-volt control logic drivers, the control logic input has been designed to handle a 5-volt logic HIGH signal. (A minimal current will be sourced out of the VDD pin when the control logic input voltage level exceeds VDD.) Latch-Up Avoidance
7
GND
8
RF1
Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS™ device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 3.
Note 1: All RF pins must be DC blocked with an external series capacitor or held at 0 VDC.
Table 3. Absolute Maximum Ratings
Symbol
VDD VI VCTRL TST TOP PIN VESD
Parameter/ Conditions
Power supply voltage Voltage on any input except for the CTRL input Voltage on CTRL input Storage temperature range Operating temperature range Input power (50Ω) ESD voltage (Human Body Model)
Min
-0.3 -0.3
Max
4.0 VDD+ 0.3 5.0
Units
V V V °C °C dBm V
-65 -40
150 85 33 200
©2005 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 7
Document No. 70-0097-01
│ UltraCMOS™ RFIC Solutions
PE4231
Product Specification
Typical Performance Data @ -40 °C to 85 °C (Unless Otherwise Noted)
Figure 4. Insertion Loss – RFC to RF1
Figure 5. Input 1dB Compression Point
40 -40 8C
0
-0.25
1dB Compression Point (dBm)
-40 8C Insertion Loss (dB) -0.5
30 85 8C 25 8C
-0.75 85 8C -1 25 8C
20
10
-1.25
-1.5 0 200 400 600 800 1000 1200
0 0 200 400 600 800 1000 1200
Frequency (MHz)
Frequency (MHz)
Figure 6. Insertion Loss – RFC to RF2
Figure 7. Isolation – RFC to RF1
0
0
-0.25 -40 8C Insertion L.