ICS87949-01

www.DataSheet4U.com PRELIMINARY Integrated Circuit Systems, Inc. ICS87949-01 LOW SKEW ÷1, ÷2 CLOCK GENERATOR GENERAL DESCRIPTION The ICS87949-01 is a low skew, ÷1, ÷2 Clock Generator and a member of the HiPerClockS™ HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS87949-01 has selectable single ended clock or LVPECL clock inputs. The single ended clock input accepts LVCMOS or LVTTL input levels. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from 15 to 30 by utilizing the ability of the outputs to drive two series terminated lines. FEATURES 15 single ended LVCMOS outputs, 7Ω typical output impedance Selectable LVCMOS or LVPECL clock inputs CLK0 and CLK1 can accept the following input levels: LVCMOS and LVTTL PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL Maximum input frequency: 250MHz Output skew: 200ps (maximum) Part-to-part skew: 500ps (typical) Multiple frequency skew: 350ps (maximum) 3.3V input, outputs may be either 3.3V or 2.5V supply modes 0°C to 70°C ambient operating temperature Industrial temperature information available upon request Functionally compatible to the MPC949 in a smaller footprint requiring less board space ,&6 The divide select inputs, DIV_SELx, control the output frequency of each bank. The outputs can be utilize...