AS4LC4M4883C

www.DataSheet4U.com AUSTIN SEMICONDUCTOR, INC. AS4LC4M4 883C 4 MEG x 4 DRAM DRAM AVAILABLE IN MILITARY SPECIFICATIONS MIL-STD-883 SMD Planned 4 MEG x 4 DRAM 3.3V, EDO PAGE MODE PIN ASSIGNMENT (Top View) 24/28-Pin 1 1 2 2 3 3 4 4 5 5 6 6 9 8 10 9 11 10 12 11 13 12 14 13 28 26 27 25 26 24 25 23 24 22 23 21 20 19 19 18 18 17 17 16 16 15 15 14 VSS DQ4 DQ3 /C/A/S /O/E A9 A8 A7 A6 A5 A4 Vss FEATURES Industry-standard x4 pinout, timing, functions and packages High-performance CMOS silicon-gate process Single +3.3V ± 0.3V power supply Low power, 1mW standby; 150mW active, typical All inputs, outputs and clocks are TTL-compatible Refresh modes: ?R?A/S ONLY, ?C?A/S-BEFORE-?R?A/S (CBR) HIDDEN 2,048-cycle (11 row-, 11 column-addresses) Extended Data-Out (EDO) PAGE access cycle 5V-tolerant I/Os (5.5V maximum VIH level) VCC DQ1 DQ2 /W/E /R/A/S NC A10 A0 A1 A2 A3 VCC OPTIONS Timing 60ns access (Contact Factory) 70ns acess 80ns access Packages Ceramic SOJ Ceramic LCC Ceramic Gull Wing MARKING -6 -7 -8 ECJ EC ECG No. 505 No. 212 No. 603 KEY TIMING PARAMETERS SPEED -6 -7 -8 tRC 110ns 130ns 150ns tRAC 60ns 70ns 80ns tPC 30ns 35ns 40ns tAA 30ns 35ns 40ns tCAC 15ns 18ns 20ns tCAS 12ns 15ns 20ns GENERAL DESCRIPTION The AS4LC4M4 is a randomly accessed solid-state memory containing 16,777,216 bits organized in a x4 configuration. The AS4LC4M4 ?R?A/S is used to latch the first 11 bits and ?C?A/S the latter 11 bits. READ and WRITE cycles are selected with the ? W / ...