CE71

www.DataSheet4U.com CE71 Series Embedded Array 0.25µm CMOS Technology Features 0.18µm Leff (0.24µm drawn) Propagation delay of 61 ps Separate core and I/O supply voltages Mixed-signal macros–A/D and D/A converters I/Os: 2.5V, 3.3V, 5V tolerant Core power supply voltage: 2.5V, 1.8V, 1.5V Junction temperature: -40ºC~125ºC High performance and special I/Os–PCML, LVDS, PCI, SSTL, GTL+, AGP, USB Analog and digital PLLs Packaging options: QFP, HQFP, BGA, TBGA Support for major third-party EDA tools PCI Fixed Layout Soft Macro t Embedded Hard Macro Clk 5V Tol. 3V Clock Tree Fixed Layout Soft Macro PCML Description Fujitsu’s CE71 is a series of high-performance, 0.18µm Leff CMOS embedded arrays that include full support of diffused high-speed RAMs, ROMs, mixed-signal macros, and a variety of other embedded functions. The CE71 series offers density and performance similar to those of standard cells, yet provides the time-to-market advantage of gate arrays. The CE71 series devices include 44µm, 66µm, or 88µm pad pitch for a cost-effective solution for both pad-limited and core-limited designs. With a nominal 1.5V to 2.5V core operation and with 2.5V and 3.3V/5V tolerant I/Os, the CE71 series features a very low-power consumption of 0.06µW/gate/MHz. Potential applications for the CE71 series include computing, graphics, communications, networking, wireless, and consumer designs. J-Series with 66µm Stagger Pad Pitch and Wire Bonding t Frame CE71J1 CE71J2 ...