PDM41028

www.DataSheet4U.com PDM41028 1 Megabit Static RAM 256K x 4-Bit Features n 1 2 3 4 5 6 7 Description The PDM41028 is a high-performance CMOS static RAM organized as 262,144 x 4 bits. Writing to this device is accomplished when the write enable (WE) and the chip enable (CE) inputs are both LOW. Reading is accomplished when WE remains HIGH and CE and OE are both LOW. The PDM41028 operates from a single +5V power supply and all the inputs and outputs are fully TTLcompatible. The PDM41028 comes in two versions, the standard power version PDM41028SA and a low power version the PDM41028LA. The two versions are functionally the same and only differ in their power consumption. The PDM41028 is available in a 28-pin 300-mil SOJ, and a 28-pin 400-mil SOJ for surface mount applications. High speed access times Com’l: 10, 12 and 15 ns Ind’l: 12 and 15 ns Low power operation (typical) - PDM41028SA Active: 400 mW Standby: 150 mW - PDM41028LA Active: 350 mW Standby: 100 mW Single +5V (±10%) power supply TTL-compatible inputs and outputs Packages Plastic SOJ (300 mil) - TSO Plastic SOJ (400 mil) - SO n n n n Functional Block Diagram A0 A17 Decoder Memory Matrix Addresses 8 9 10 11 I/O 0 I/O 1 I/O 2 I/O 3 Input Data Control Column I/O CE WE OE 12 1 Rev. 2.2 - 4/29/98 PDM41028 Pin Configuration SOJ A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 CE OE Vss 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 Vcc A6 A5 A4 A3 A2 A1 A0 N...