(PDF) IC62LV256 Datasheet PDF | ICSI





IC62LV256 Datasheet PDF

Part Number IC62LV256
Description 32K x 8 Low Power SRAM
Manufacture ICSI
Total Page 9 Pages
PDF Download Download IC62LV256 Datasheet PDF

Features: Datasheet pdf www.DataSheet4U.com IC62LV256 Document Title 32K x 8 Low Power SRAM with 3.3V Revision History Revision No 0A Histo ry Initial Draft Draft Date October 5, 2001 Remark The attached datasheets a re provided by ICSI. Integrated Circuit Solution Inc reserve the right to chan ge the specifications and products. ICS I will answer to your questions about d evice. If you have any questions, pleas e contact the ICSI offices. Integrated Circuit Solution Inc. ALSR007-0A 10/5/ 2001 1 IC62LV256 32K x 8 LOW VOLTAGE STATIC RAM FEATURES • Access time: 4 5, 70, 100 ns • Low active power: 70 mW • Low standby power — 60 µW CMO S standby • Fully static operation: n o clock or refresh required • TTL com patible inputs and outputs • Single 3 .3V power supply DESCRIPTION The ICSI IC62LV256 is a low power, 32, 768-word by 8-bit static RAM. It is fabricated u sing ICSI's high-performance CMOS doubl e-metal technology. When CE is HIGH (de selected), the device assumes a standby mode at which the power dissipation is.

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IC62LV256 datasheet
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IC62LV256
Document Title
32K x 8 Low Power SRAM with 3.3V
Revision History
Revision No
0A
History
Initial Draft
Draft Date
October 5,2001
Remark
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and
products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
ALSR007-0A 10/5/2001
1

IC62LV256 datasheet
IC62LV256
32K x 8 LOW VOLTAGE STATIC RAM
FEATURES
• Access time: 45, 70, 100 ns
• Low active power: 70 mW
• Low standby power
— 60 µW CMOS standby
• Fully static operation: no clock or refresh
required
• TTL compatible inputs and outputs
• Single 3.3V power supply
DESCRIPTION
The ICSI IC62LV256 is a low power, 32, 768-word by 8-bit
static RAM. It is fabricated using ICSI's high-performance
CMOS double-metal technology.
When CE is HIGH (deselected), the device assumes a standby
mode at which the power dissipation is reduced to
20 µW (typical) with CMOS input levels.
Easy memory expansion is provided by using an active LOW
Chip Enable (CE) input and an active LOW Output Enable (OE)
input. The active LOW Write Enable (WE) controls both writing
and reading of the memory.
The IC62LV256 is pin compatible with other 32K x 8 SRAMs
in 300mil DIP and SOJ, 330mil SOP, and 8*13.4mm TSOP-1
packages.
FUNCTIONAL BLOCK DIAGRAM
A0-A14
VCC
GND
I/O0-I/O7
DECODER
I/O
DATA
CIRCUIT
256 X 1024
MEMORY ARRAY
COLUMN I/O
CE
OE
CONTROL
CIRCUIT
WE
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2 Integrated Circuit Solution Inc.
ALSR007-0A 10/5/2001





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