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ADCMP606 Dataheets PDF



Part Number ADCMP606
Manufacturers Analog Devices
Logo Analog Devices
Description Single-Supply CML Comparators
Datasheet ADCMP606 DatasheetADCMP606 Datasheet (PDF)

www.DataSheet4U.com Preliminary Technical Data FEATURES Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply CML Comparators ADCMP606/ADCMP607 FUNCTIONAL BLOCK DIAGRAM VCCI VCCO (ADCMP607 Only) LE/HYS INPUT (ADCMP607 Only) APPLICATIONS High speed instrumentation Clock and data signal restoration Logic level shifting or translation Pulse spectroscopy High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/vo.

  ADCMP606   ADCMP606



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www.DataSheet4U.com Preliminary Technical Data FEATURES Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply CML Comparators ADCMP606/ADCMP607 FUNCTIONAL BLOCK DIAGRAM VCCI VCCO (ADCMP607 Only) LE/HYS INPUT (ADCMP607 Only) APPLICATIONS High speed instrumentation Clock and data signal restoration Logic level shifting or translation Pulse spectroscopy High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators Automatic test equipment (ATE) 12 Q SDN INPUT (ADCMP607 Only) Figure 1. 11 VEE 10 Q VCCO 1 VCCI 2 VEE 3 PIN 1 INDICATOR 9 VEE 8 LE/HYS 7 SDN ADCMP607 TOP VIEW (Not to Scale) Figure 2.LFCSP Pin Configuration GENERAL DESCRIPTION The ADCMP606/ADCMP607 are very fast comparators fabricated on Analog Devices’ proprietary XFCB2 process. These comparators are exceptionally versatile and easy to use. Features include an input range from VEE − 0.5 V to VCC + 0.5 V, low noise CML-compatible output drivers, and TTL-/CMOScompatible latch inputs with adjustable hysteresis and/or shutdown inputs. The device offers 1 ns propagation delay with 2 ps RMS random jitter (RJ). Overdrive and slew rate dispersion are typically less than 50 ps. A flexible power supply scheme allows the devices to operate with a single +2.5 V positive supply and a −0.5 V to +3.0 V input signal range up to a +5.5 V positive supply with a −0.5 V to +6 V input signal range. The ADCMP607 features split input/output supplies with no sequencing restrictions to support a wide input signal range with independent output level control and power savings. The CML-compatible output stage is fully back-matched for superior performance. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. On the ADCMP607, high speed latch and programmable hysteresis features are also provided with a unique single-pin control option. The ADCMP606 is available in a 6-lead SC70 package, and the ADCMP607 is available in a 12-lead LSCFP package. Rev. PrA Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved. VEE 5 05917-003 VN 6 VP 4 05917-001 10 mV sensitivity rail to rail at VCC = 2.5 V Input common-mode voltage from −0.2 V to VCC + 0.2 V CML-compatible output stage 1 ns propagation delay 50 mW.


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