ADN2806

www.DataSheet4U.com 622 Mbps Clock and Data Recovery IC ADN2806 FEATURES Exceeds SONET requirements for jitter transfer/ generation/tolerance Patented clock recovery architecture No reference clock required Loss-of-lock indicator I2C® interface to access optional features Single-supply operation: 3.3 V Low power: 359 mW typical 5 mm × 5 mm, 32-lead LFCSP, Pb free GENERAL DESCRIPTION The ADN2806 provides the receiver functions for clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN2806 automatically locks to 622 Mbps data without the need for an external reference clock or programming. In the absence of input data, the output clock drifts no more than ±5%. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for −40°C to +85°C ambient temperature, unless otherwise noted. This device, together with a PIN diode, TIA preamplifier, and a lim amp can implement a highly integrated, low cost, low power fiber optic receiver. The ADN2806 is available in a compact 5 mm × 5 mm, 32-lead LFCSP. APPLICATIONS BPON ONT SONET OC-12 WDM transponders Regenerators/repeaters Test equipment Broadband cross-connects and routers FUNCTIONAL BLOCK DIAGRAM REFCLKP/REFCLKN (OPTIONAL) LOL CF1 CF2 VCC VEE FREQUENCY DETECT PIN NIN BUFFER PHASE SHIFTER PHASE DETECT LOOP FILTER LOOP FILTER VCO VREF DATA RE-TIMING 2 2 DATAOUTP/ DATAOUTN CLKOUTP/ CLKOUTN ADN2806 05831-001 Figure 1. Rev. 0 Infor...