EMD4DXV6T1

www.DataSheet4U.com EMD4DXV6T1, EMD4DXV6T5 Preferred Devices Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network (3) http://onsemi.com (2) R1 Q1 Q2 R2 (4) R1 (5) (6) R2 (1) The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base−emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the EMD4DXV6T1 series, two complementary BRT devices are housed in the SOT−563 package which is ideal for low power surface mount applications where board space is at a premium. Features 6 1 Simplifies Circuit Design Reduces Board Space Reduces Component Count These are Pb−Free Devices SOT−563 CASE 463A STYLE 1 MAXIMUM RATINGS (TA = 25°C unless otherwise noted, common for Q1 and Q2, − minus sign for Q1 (PNP) omitted) Rating Collector-Base Voltage Collector-Emitter Voltage Collector Current Symbol VCBO VCEO IC Value 50 50 100 Unit Vdc Vdc mAdc 1 U7 M G G MARKING DIAGRAM THERMAL CHARACTERISTICS Characteristic (One Junction Heated) Total Device Dissipation TA = 25°C (Note 1) Derate above 25°C (Note 1) Thermal Resistance, Junction-to-Ambient (Note 1) Total Device Dissipation TA = 25°C (Note 1) Derate above 25°C Thermal Resistance, Junction-to-Ambient (Note 1) Jun...