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DC-to-DC Controller. ADP1821 Datasheet |
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FEATURES
Wide power-input voltage range: 1 V to 24 V
Chip supply voltage range: 3 V to 5.5 V
Wide output voltage range: 0.6 V to 85% of input voltage
1% accuracy, 0.6 V reference voltage
All N-channel MOSFET design for low cost
Fixed-frequency operation 300 kHz, 600 kHz, or
synchronized operation up to 1.2 MHz
No current sense resistor required
Power-good output
Programmable soft start with reverse current protection
Soft start, thermal overload, current-limit protection
Undervoltage lockout
10 μA shutdown supply current
Small, 16-lead QSOP
APPLICATIONS
Telecom and networking systems
Set-top boxes
Printers
Servers
Medical imaging systems
Microprocessor and DSP core power supplies
Mobile communication base stations
BIAS INPUT
5V
1µF
10Ω
100kΩ
1.5nF
1µF
4.7kΩ
VCC PVCC
ADP1821
SHDN
FREQ
SYNC
PWGD
BST
DH
SW
CSL
COMP
DL
PGND
SS GND FB
D1
0.47µF
3.3kΩ
POWER INPUT
2.5V TO 20V
+ CIN1 + CIN2
2.2µF 2.2µF
25V 25V
×2
M1
L1 = 1µH
M2 M3
COUT1
10µF
+
6.3V
×2
COUT2
820µF
2.5V
×2
OUTPUT
1.8V, 20A
300Ω
10nF
2kΩ
6.8nF 100nF
AGND
1kΩ
fSW = 300kHz
CIN2: SANYO, OSCON 20SP180M
COUT2: SANYO, OSCON 2R5SEPC820M
L1: COILTRONICS, HC7-1R0
CIN1: MURATA, GRM31MR71E225k
M1: IRLR7807Z
M2, M3: IRFR3709Z
D1: VISHAY BAT54
Figure 1. Typical Operating Circuit
Step-Down DC-to-DC Controller
ADP1821
GENERAL DESCRIPTION
The ADP1821 is a versatile and inexpensive, synchronous, pulse
width-modulated (PWM), voltage-mode, step-down controller.
It drives an all N-channel power stage to regulate an output voltage
as low as 0.6 V. The ADP1821 can be configured to provide
output voltages from 0.6 V to 85% of the input voltage and is
sized to handle large MOSFETs for point-of-load regulators.
The ADP1821 is well suited for a wide range of high power
applications, such as DSP and processor core power in telecom,
medical imaging, high performance servers, and industrial
applications. It operates from a 3.0 V to 5.5 V supply with a
power input voltage ranging from 1.0 V to 24 V.
The ADP1821 operates at a pin-selectable, fixed switching
frequency of either 300 kHz or 600 kHz, minimizing external
component size and cost. For noise-sensitive applications, it
can be synchronized to an external clock to achieve switching
frequencies between 300 kHz and 1.2 MHz. The ADP1821
includes soft start protection to limit the inrush current from
the input supply during startup, reverse current protection
during soft start for precharged outputs, as well as a unique
adjustable lossless current-limit scheme utilizing external
MOSFET sensing.
The ADP1821 operates over the –40°C to +85°C temperature
range and is available in a 16-lead QSOP.
97
TA = 25°C
96 FREQUENCY = 300kHz
3.3V OUTPUT
95
94
93
92 1.8V OUTPUT
91
90
89
88
87
0 2 4 6 8 10 12 14
LOAD CURRENT (A)
Figure 2. Efficiency vs. Load Current, 5 V Input
16
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
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ADP1821
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Simplified Block Diagram ........................................................... 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ........................................................................ 9
Soft Start ........................................................................................ 9
Error Amplifier ............................................................................. 9
Current-Limit Scheme................................................................. 9
MOSFET Drivers........................................................................ 10
Input Voltage Range ................................................................... 10
Setting the Output Voltage ........................................................ 10
Switching Frequency Control and Synchronization.............. 10
Compensation............................................................................. 11
Power-Good Indicator ............................................................... 11
REVISION HISTORY
12/06—Rev. A to Rev. B
Updated Format..................................................................Universal
Changes to Features Section............................................................ 1
Changes to Applications Section .................................................... 1
Changes to General Description Section ...................................... 1
Changes to Error Amplifier............................................................. 3
Changes to PWM Controller .......................................................... 3
Changes to Oscillator Frequency.................................................... 3
Changes to Theory of Operation Section...................................... 9
Changes to Application Information Section ............................. 12
Added PCB Layout Section........................................................... 19
Changes to Application Circuits Section..................................... 21
Added Summary of Equations Section........................................ 23
Thermal Shutdown .................................................................... 11
Shutdown Control...................................................................... 11
Application Information................................................................ 12
Selecting the Input Capacitor ................................................... 12
Output LC Filter ......................................................................... 12
Selecting the MOSFETs ............................................................. 13
Setting the Current Limit .......................................................... 14
Feedback Voltage Divider ......................................................... 14
Compensating the Voltage Mode Buck Regulator................. 14
Setting the Soft Start Period...................................................... 18
PCB Layout Guideline ................................................................... 19
Recommended Component Manufacturers........................... 20
Application Circuits ....................................................................... 21
Summary of Equations .................................................................. 23
Compensation Equations .......................................................... 23
Type II Compensation Equations ............................................ 23
Type III Compensation Equations........................................... 23
Outline Dimensions ....................................................................... 24
Ordering Guide .......................................................................... 24
1/06—Rev. 0 to Rev. A
Changes to Specifications Table ......................................................3
Changes to Theory of Operation Section.................................... 10
Changes to Input Voltage Range Section .................................... 11
Added Equation 1........................................................................... 12
Changes to Equation 7 and Equation 8 ....................................... 13
Added Equation 9........................................................................... 13
Changes to Equation 16................................................................. 14
Changes to Figure 15...................................................................... 14
Changes to Equation 21................................................................. 15
Changes to Figure 16...................................................................... 15
Changes to Equation 28................................................................. 15
Updated Outline Dimensions....................................................... 18
7/05—Revision 0: Initial Version
Rev. B | Page 2 of 24
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ADP1821
SPECIFICATIONS
VVCC = VPVCC = VSHDN = VFREQ = 5 V, SYNC = GND. All limits at temperature extremes are guaranteed via correlation using standard
statistical quality control (SQC). TA = −40°C to +85°C, unless otherwise specified.
Table 1.
Parameter
POWER SUPPLY
Input Voltage
Undervoltage Lockout Threshold
Undervoltage Lockout Hysteresis
Quiescent Current
Shutdown Current
Power Stage Supply Voltage
ERROR AMPLIFIER
FB Regulation Voltage
FB Input Bias Current
Error Amplifier Open-Loop Voltage Gain
COMP Output Sink Current
COMP Output Source Current
COMP Clamp High Voltage
COMP Clamp Low Voltage
PWM CONTROLLER
PWM Peak Ramp Voltage
DL Minimum On-Time
DH Maximum Duty Cycle
DH Minimum Duty Cycle
SOFT START
SS Pull-Up Resistance
SS Pull-Down Resistance
OSCILLATOR
Oscillator Frequency
Synchronization Range
SYNC Minimum Pulse Width
CURRENT SENSE
CSL Threshold Voltage
CSL Output Current
Current Sense Blanking Period
GATE DRIVERS
DH Rise Time
DH Fall Time
DL Rise Time
DL Fall Time
DL Low to DH High Dead Time
DH Low to DL High Dead Time
LOGIC THRESHOLDS (SHDN, SYNC, FREQ)
SHDN, SYNC, FREQ Input High Voltage
SHDN, SYNC, FREQ Input Low Voltage
SYNC, FREQ Input Leakage Current
SHDN Pull-Down Resistance
Conditions
VVCC rising
VVCC
IVCC + IVCC, not switching
SHDN = GND
FREQ = VCC (300 kHz)
FREQ = GND (300 kHz)
FREQ = GND (300 kHz)
SS = GND
VSS = 0.6 V
FREQ = GND
FREQ = VCC
FREQ = GND
FREQ = VCC
Relative to PGND
VCSL = 0 V
CGATE = 3 nF, VDH = VIN, VBST − VSW = 5 V
CGATE = 3 nF, VDH = VIN, VBST − VSW = 5 V
CGATE = 3 nF, VDL = VIN
CGATE = 3 nF, VDL = 0 V
VVCC = 3.0 V to 5.5 V
VVCC = 3.0 V to 5.5 V
SYNC = FREQ = GND
Min Typ Max Unit
3.0 5.5
2.5 2.7 2.9
0.1
12
10
1.0 24
V
V
V
mA
μA
V
594
–100
600
+1
70
600
110
2.4
0.75
606
+100
mV
nA
dB
μA
μA
V
V
1.25
140 170 200
85 90
13
V
ns
%
%
95
1.65 2.5
4.2
kΩ
kΩ
250 310 375
kHz
470 570 720
kHz
300 600 kHz
600 1200 kHz
80 ns
−30 0
+30
42 50 54
160
mV
μA
ns
16 ns
12 ns
19 ns
13 ns
33 ns
42 ns
2.0
0.8
0.1 1
100
V
V
μA
kΩ
Rev. B | Page 3 of 24
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