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DC-to-DC Controller. ADP1823 Datasheet |
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Dual, Interleaved, Step-Down
DC-to-DC Controller with Tracking
ADP1823
FEATURES
Fixed-frequency operation: 300 kHz, 600 kHz, or
synchronized operation up to 1 MHz
Supply input range: 2.9 V to 20 V
Interleaved operation results in smaller, low cost input
capacitor
All-N-channel MOSFET design for low cost
±0.85% accuracy at 0°C to 70°C
Soft start, thermal overload, current-limit protection
10 μA shutdown supply current
Internal linear regulator
Lossless RDSON current-limit sensing
Reverse current protection during soft start for handling
precharged outputs
Independent Power OK outputs
Voltage tracking for sequencing or DDR termination
Available in 5 mm × 5 mm, 32-lead LFCSP
APPLICATIONS
Telecommunications and networking systems
Medical imaging systems
Base station power
Set-top boxes
Printers
DDR termination
GENERAL DESCRIPTION
The ADP1823 is a versatile, dual, interleaved, synchronous
PWM buck controller that generates two independent output
rails from an input of 2.9 V to 20 V. Each controller can be con-
figured to provide output voltages from 0.6 V to 85% of the
input voltage and is sized to handle large MOSFETs for point-
of-load regulators. The two channels operate 180° out of phase,
reducing stress on the input capacitor and allowing smaller, low
cost components. The ADP1823 is ideal for a wide range of
high power applications, such as DSP and processor core I/O
power, and general-purpose power in telecommunications,
medical imaging, PC, gaming, and industrial applications.
The ADP1823 operates at a pin-selectable, fixed switching
frequency of either 300 kHz or 600 kHz, minimizing external
component size and cost. For noise-sensitive applications, it can
also be synchronized to an external clock to achieve switching
TYPICAL APPLICATION CIRCUIT
IN = 12V
180µF
1µF
PV IN
TRK1
TRK2
VREG
EN1
EN2
180µF
IRLR7807Z
0.47µF
1.2V,
6A
560µF
2.2µH
2kΩ
2kΩ
IRFR3709Z
BST1 BST2
0.47µF
DH1 DH2
ADP1823
SW1
SW2
CSL1
DL1
CSL2
DL2
PGND2
2kΩ
IRFR3709Z
IRLR7807Z
2.2µH
2kΩ
1.8V,
8A
560µF
390pF
2kΩ
4.53kΩ 3900pF
PGND1 FB2
FB1 COMP2
COMP1
FREQ
LDOSD
GND SYNC
390pF
1kΩ
3900pF 4.53kΩ
Figure 1. Typical Application Circuit
frequencies between 300 kHz and 1 MHz. The ADP1823
includes soft start protection to prevent inrush current from the
input supply during startup, reverse current protection during
soft start for precharged outputs, as well as a unique adjustable
lossless current-limit scheme utilizing external MOSFET
sensing.
For applications requiring power supply sequencing, the
ADP1823 also provides tracking inputs that allow the output
voltages to track during startup, shutdown, and faults. This
feature can also be used to implement DDR memory bus
termination.
The ADP1823 is specified over the −40°C to +85°C ambient
temperature range, and is available in a 32-lead LFCSP package.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
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ADP1823
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Typical Application Circuit ............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Functional Block Diagram .............................................................. 6
Pin Configuration and Function Descriptions............................. 7
Typical Performance Characteristics ............................................. 9
Theory of Operation ...................................................................... 13
Input Power ................................................................................. 13
Start-Up Logic............................................................................. 13
Internal Linear Regulator .......................................................... 13
Oscillator and Synchronization ................................................ 13
Error Amplifier ........................................................................... 14
Soft Start ...................................................................................... 14
Power OK Indicator ................................................................... 14
REVISION HISTORY
11/06—Rev. 0 to Rev. A
Changes to Features and Applications Sections ........................... 1
Changes to Specifications Section.................................................. 3
Changes to Absolute Maximum Ratings Section......................... 5
Replaced Theory of Operation Section ....................................... 13
Added Feedback Voltage Divider Section ................................... 18
Changes to Ratiometric Tracking Section................................... 23
Replaced PCB Layout Guidelines Section................................... 25
Added Application Circuits Section............................................. 29
Changes to Ordering Guide .......................................................... 31
4/06—Revision 0: Initial Version
Tracking ....................................................................................... 14
MOSFET Drivers........................................................................ 15
Current Limit.............................................................................. 15
Applications Information .............................................................. 16
Selecting the Input Capacitor ................................................... 16
Selecting the MOSFETS ............................................................ 17
Setting the Current Limit .......................................................... 18
Feedback Voltage Divider ......................................................... 18
Compensating the Voltage Mode Buck Regulator................. 18
Soft Start ...................................................................................... 22
Voltage Tracking......................................................................... 22
Coincident Tracking .................................................................. 22
Ratiometric Tracking ................................................................. 23
Thermal Considerations............................................................ 24
PCB Layout Guidelines.................................................................. 25
LFCSP Package Considerations................................................ 26
Application Circuits ....................................................................... 29
Outline Dimensions ....................................................................... 31
Ordering Guide .......................................................................... 31
Rev. A | Page 2 of 32
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ADP1823
SPECIFICATIONS
VIN = 12 V, EN = FREQ = PV = VREG = 5 V, SYNC = GND, TJ = −40°C to +125°C, unless otherwise specified. All limits at temperature
extremes are guaranteed via correlation using standard Statistical Quality Control (SQC). Typical values are at TA = 25°C.
Table 1.
Parameter
POWER SUPPLY
IN Input Voltage
IN Quiescent Current
IN Shutdown Current
VREG Undervoltage Lockout Threshold
VREG Undervoltage Lockout Hysteresis
ERROR AMPLIFER
FB1, FB2 Regulation Voltage
FB1, FB2 Input Bias Current
Open-Loop Voltage Gain
Gain-Bandwidth Product
COMP1, COMP2 Sink Current
COMP1, COMP2 Source Current
COMP1, COMP2 Clamp High Voltage
COMP1, COMP2 Clamp Low Voltage
LINEAR REGULATOR
VREG Output Voltage
VREG Load Regulation
VREG Line Regulation
VREG Current Limit
VREG Short-Circuit Current
IN to VREG Dropout Voltage
VREG Minimum Output Capacitance
PWM CONTROLLER
PWM Ramp Voltage Peak
DH1, DH2 Maximum Duty Cycle
DH1, DH2 Minimum Duty Cycle
SOFT START
SS1, SS2 Pull-Up Resistance
SS1, SS2 Pull-Down Resistance
SS1, SS2 to FB1, FB2 Offset Voltage
SS1, SS2 Pull-Up Voltage
TRACKING
TRK1, TRK2 Common-Mode Input
Voltage Range
TRK1, TRK2 to FB1, FB2 Offset Voltage
TRK1, TRK2 Input Bias Current
Conditions
PV = VREG (using internal regulator)
IN = PV = VREG (not using internal regulator)
Not switching, IVREG = 0 mA
EN1 = EN2 = GND
VREG rising
TA = 25°C, TRK1, TRK2 > 700 mV
TJ = 0°C to 85°C, TRK1, TRK2 > 700 mV
TJ = −40°C to +125°C, TRK1, TRK2 > 700 mV
TJ = 0°C to 70°C, TRK1, TRK2 > 700 mV
TA = 25°C, IVREG = 20 mA
VIN = 7 V to 20 V, IVREG = 0 mA to 100 mA,
TA = −40°C to +85°C
IVREG = 0 mA to 100 mA, VIN = 12 V
VIN = 7 V to 20 V, IVREG = 20 mA
VREG = 4 V
VREG < 0.5 V
IVREG = 100 mA
SYNC = GND
FREQ = GND (300 kHz)
FREQ = GND (300 kHz)
SS1, SS2 = GND
SS1, SS2 = 0.6 V
SS1, SS2 = 0 mV to 500 mV
TRK1, TRK2 = 0 mV to 500 mV
Min Typ Max Unit
5.5 20 V
2.9 5.5 V
1.5 3
mA
10 20 μA
2.4 2.7 2.9 V
0.125
V
597 600
591
588
595
70
20
600
120
2.4
0.75
603 mV
609 mV
612 mV
605 mV
100 nA
dB
MHz
μA
μA
V
V
4.85 5.0
4.75 5.0
−40
1
220
100 140
0.7
1
5.15 V
5.25 V
mV
mV
mA
200 mA
1.4 V
μF
1.3
85 90
1
3
V
%
%
90 kΩ
6 kΩ
−45 mV
0.8 V
0 600 mV
−5 +5 mV
100 nA
Rev. A | Page 3 of 32
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