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DS90LV049H High Temperature 3V LVDS Dual Line Driver and Receiver Pair
September 2005
DS90LV049H High Temperature 3V LVDS Dual Line Driver and Receiver Pair
General Description
The DS90LV049H is a dual CMOS flow-through differential line driver-receiver pair designed for applications requiring ultra low power dissipation, exceptional noise immunity, and high data throughput. The device is designed to support data rates in excess of 400 Mbps utilizing Low Voltage Differential Signaling (LVDS) technology. The DS90LV049H drivers accept LVTTL/LVCMOS signals and translate them to LVDS signals. The receivers accept LVDS signals and translate them to 3 V CMOS signals. The LVDS input buffers have internal failsafe biasing that places the outputs to a known H (high) state for floating receiver inputs. In addition, the DS90LV049H supports a TRI-STATE function for a low idle power state when the device is not in use. The EN and EN inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four gates.
Features
n n n n n n n n n n n n High Temperature +125˚C Operating Range Up to 400 Mbps switching rates Flow-through pinout simplifies PCB layout 50 ps typical driver channel-to-channel skew 50 ps typical receiver channel-to-channel skew 3.3 V single power supply design TRI-STATE output control Internal fail-safe biasing of receiver inputs Low power dissipation (70 mW at 3.3 V static) High impedance on LVDS outputs on power down Conforms to TIA/EIA-644-A LVDS Standard Available in low profile 16 pin TSSOP package
Connection Diagram
Dual-In-Line
Functional Diagram
20161701
Order Number DS90LV049HMT Order Number DS90LV049HMTX (Tape and Reel) See NS Package Number MTC16
20161702
Truth Table
EN L or Open H L or Open H EN L or Open L or Open H H LVDS Out OFF ON OFF OFF LVCMOS Out OFF ON OFF OFF
© 2005 National Semiconductor Corporation
DS201617
www.national.com
DS90LV049H
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VDD) LVCMOS Input Voltage (DIN) LVDS Input Voltage (RIN+, RIN-) Enable Input Voltage (EN, EN) LVCMOS Output Voltage (ROUT) LVDS Output Voltage (DOUT+, DOUT-) LVCMOS Output Short Circuit Current (ROUT) LVDS Output Short Circuit Current (DOUT+, DOUT−) LVDS Output Short Circuit Current Duration(DOUT+, DOUT−) Storage Temperature Range Continuous −65˚C to +150˚C 24 mA 100 mA −0.3 V to +4 V −0.3 V to (VDD + 0.3 V) −0.3 V to +3.9 V −0.3 V to (VDD + 0.3 V) −0.3 V to (VDD + 0.3 V) −0.3 V to +3.9 V
Lead Temperature Range Soldering (4 sec.) Maximum Junction Temperature Maximum Package Power Dissipation @ +25˚C MTC Package Derate MTC Package ESD Rating (HBM, 1.5 kΩ, 100 pF) (MM, 0 Ω, 200 pF) ≥ 7 kV ≥ 250 V 866 mW 6.9 mW/˚C above +25˚C +260˚C +150˚C
Recommended Operating Conditions
Min Supply Voltage (VDD) Operating Free Air Temperature .