DatasheetsPDF.com

registered driver. 74ALVCHT16835 Datasheet

DatasheetsPDF.com

registered driver. 74ALVCHT16835 Datasheet






74ALVCHT16835 driver. Datasheet pdf. Equivalent




74ALVCHT16835 driver. Datasheet pdf. Equivalent





Part

74ALVCHT16835

Description

18-bit registered driver



Feature


www.DataSheet4U.com INTEGRATED CIRCUITS 74ALVCHT16835 18-bit registered drive r (3-State) Product data 2002 Jun 05 P hilips Semiconductors Philips Semicond uctors Product data 18-bit registered driver (3-State) 74ALVCHT16835 FEATU RES • Wide supply voltage range of 2 .3 V to 3.6 V • Complies with JEDEC s tandard no. 8-1A. • CMOS low power co nsumption • Direct inter.
Manufacture

NXP

Datasheet
Download 74ALVCHT16835 Datasheet


NXP 74ALVCHT16835

74ALVCHT16835; face with TTL levels • Current drive 24 mA at 3.0 V • MULTIBYTETM flow-t hrough standard pin-out architecture Low inductance multiple VCC and GND p ins for minimum noise and ground bounce PIN CONFIGURATION NC NC Y1 GND Y2 Y3 VCC Y4 Y5 Y6 GND Y7 Y8 Y9 Y10 Y11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 .


NXP 74ALVCHT16835

45 44 43 42 41 40 39 38 37 36 35 34 33 3 2 31 30 29 GND NC A1 GND A2 A3 VCC A4 A 5 A6 GND A7 A8 A9 A10 A11 A12 GND A13 A 14 A15 VCC A16 A17 GND A18 CP GND • Output drive capability 50 Ω transmis sion lines @ 85 °C • ESD protection exceeds 1500 V HBM per JESD22-A114, A11 5 and 1000 V CDM per JESD22-C101 • B us hold on data inputs eliminates the n eed for external pullup/pul.


NXP 74ALVCHT16835

ldown resistors DESCRIPTION The 74ALVCH T16835 is a 18-bit registered driver. D ata flow is controlled by active low ou tput enable (OE), active high latch ena ble (LE) and clock inputs (CP). When LE is HIGH, the A to Y data flow is trans parent. When LE is LOW and CP is held a t LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP the A-d ata is stored in t.

Part

74ALVCHT16835

Description

18-bit registered driver



Feature


www.DataSheet4U.com INTEGRATED CIRCUITS 74ALVCHT16835 18-bit registered drive r (3-State) Product data 2002 Jun 05 P hilips Semiconductors Philips Semicond uctors Product data 18-bit registered driver (3-State) 74ALVCHT16835 FEATU RES • Wide supply voltage range of 2 .3 V to 3.6 V • Complies with JEDEC s tandard no. 8-1A. • CMOS low power co nsumption • Direct inter.
Manufacture

NXP

Datasheet
Download 74ALVCHT16835 Datasheet




 74ALVCHT16835
www.DataSheet4U.com
INTEGRATED CIRCUITS
74ALVCHT16835
18-bit registered driver (3-State)
Product data
2002 Jun 05
Philips
Semiconductors




 74ALVCHT16835
Philips Semiconductors
18-bit registered driver (3-State)
Product data
74ALVCHT16835
FEATURES
Wide supply voltage range of 2.3 V to 3.6 V
PIN CONFIGURATION
Complies with JEDEC standard no. 8-1A.
CMOS low power consumption
Direct interface with TTL levels
Current drive ± 24 mA at 3.0 V
MULTIBYTETM flow-through standard pin-out architecture
Low inductance multiple VCC and GND pins for minimum noise
and ground bounce
Output drive capability 50 transmission lines @ 85 °C
ESD protection exceeds 1500 V HBM per JESD22-A114, A115
and 1000 V CDM per JESD22-C101
Bus hold on data inputs eliminates the need for external
pullup/pulldown resistors
DESCRIPTION
The 74ALVCHT16835 is a 18-bit registered driver. Data flow is
controlled by active low output enable (OE), active high latch enable
(LE) and clock inputs (CP).
When LE is HIGH, the A to Y data flow is transparent. When LE is
LOW and CP is held at LOW or HIGH, the data is latched; on the
LOW to HIGH transient of CP the A-data is stored in the
latch/flip-flop.
When OE is LOW the outputs are active. When OE is HIGH, the
outputs go to the high impedance OFF-state. Operation of the OE
input does not affect the state of the latch/flip-flop.
To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf 2.5 ns
SYMBOL
PARAMETER
NC
NC
Y1
GND
Y2
Y3
VCC
Y4
Y5
Y6
GND
Y7
Y8
Y9
Y10
Y11
Y12
GND
Y13
Y14
Y15
VCC
Y16
Y17
GND
Y18
OE
LE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
CONDITIONS
56 GND
55 NC
54 A1
53 GND
52 A2
51 A3
50 VCC
49 A4
48 A5
47 A6
46 GND
45 A7
44 A8
43 A9
42 A10
41 A11
40 A12
39 GND
38 A13
37 A14
36 A15
35 VCC
34 A16
33 A17
32 GND
31 A18
30 CP
29 GND
SH00188
TYPICAL
tPHL/tPLH
Propagation delay
An to Yn;
LE to Yn;
CP to Yn
VCC = 3.3 V, CL = 50 pF
2.3
2.7
2.2
fmax Maximum clock frequency
VCC = 3.3 V, CL = 50 pF
CI Input capacitance
CI/O Input/Output capacitance
CPD
Power dissipation capacitance per buffer
VI = GND to VCC1
transparent mode
Output enabled
Output disabled
Clocked mode
Output enabled
Output disabled
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + S (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V; S (CL × VCC2 × fo) = sum of outputs.
350
4.0
8.0
13
3
22
15
UNIT
ns
MHz
pF
pF
pF
2002 Jun 05
2 853-2350 28376




 74ALVCHT16835
Philips Semiconductors
18-bit registered driver (3-State)
Product data
74ALVCHT16835
ORDERING INFORMATION
PACKAGES
56-Pin Plastic TSSOP (TVSOP), 0.4 mm pitch
PIN DESCRIPTION
PIN NUMBER
1, 2, 55
3, 5, 6, 8, 9, 10, 12, 13,
14, 15, 16, 17, 19, 20,
21, 23, 24, 26
4, 11, 18, 25, 29, 32, 39,
46, 53, 56
7, 22, 35, 50
27
28
30
54, 52, 51, 49, 48, 47,
45, 44, 43, 42, 41, 40,
38, 37, 36, 34, 33, 31
SYMBOL NAME AND FUNCTION
NC No connection
Y1 to Y18 Data outputs
GND
VCC
OE
LE
CP
Ground (0 V)
Positive supply voltage
Output enable input
(active LOW)
Latch enable input
Clock input
A1 to A18 Data inputs
TEMPERATURE
RANGE
–40 to +85 °C
ORDER CODE
74ALVCHT16835DGV
LOGIC SYMBOL
DRAWING
NUMBER
SOT481-2
OE
CP
LE
A1 D
LE Y1
CP
TO THE 17 OTHER CHANNELS
SH00203
2002 Jun 05
3



Recommended third-party 74ALVCHT16835 Datasheet






@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)