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BUK9612-55B

NXP

(BUK9512-55B / BUK9612-55B) logic level FET

www.DataSheet4U.com BUK95/9612-55B TrenchMOS™ logic level FET Rev. 01 — 28 April 2003 Product data 1. Product profile 1...


NXP

BUK9612-55B

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www.DataSheet4U.com BUK95/9612-55B TrenchMOS™ logic level FET Rev. 01 — 28 April 2003 Product data 1. Product profile 1.1 Description N-channel enhancement mode field-effect power transistor in a plastic package using Philips High-Performance Automotive (HPA) TrenchMOS™ technology. Product availability: BUK9512-55B in SOT78 (TO-220AB) BUK9612-55B in SOT404 (D2-PAK). 1.2 Features s Low on-state resistance s 175 °C rated s Q101 compliant s Logic level compatible. 1.3 Applications s Automotive systems s Motors, lamps and solenoids s 12 V and 24 V loads s General purpose power switching. 1.4 Quick reference data s EDS(AL)S ≤ 172 mJ s ID ≤ 75 A s RDSon = 10.2 mΩ (typ) s Ptot ≤ 157 W. 2. Pinning information Table 1: Pin 1 2 3 mb Pinning - SOT78 and SOT404, simplified outline and symbol Description gate (g) drain (d) source (s) mounting base; connected to drain (d) 2 1 MBK106 Simplified outline mb mb Symbol d [1] g s MBB076 3 MBK116 1 2 3 SOT78 (TO-220AB) [1] It is not possible to make connection to pin 2 of the SOT404 package. SOT404 (D2-PAK) Philips Semiconductors BUK95/9612-55B TrenchMOS™ logic level FET 3. Limiting values Table 2: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDS VDGR VGS ID Parameter drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) Tmb = 25 °C; VGS = 5 V; Figure 2 and 3 Tmb = 100 °C; VGS = 5 V; Figure 2 IDM Ptot Tstg Tj IDR IDRM EDS(AL)S peak drain current to...




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