Level translating I2C-bus/SMBus repeater
PCA9509
Level translating I2C-bus/SMBus repeater
Rev. 7 — 4 November 2014
Product data sheet
1. General description
Th...
Description
PCA9509
Level translating I2C-bus/SMBus repeater
Rev. 7 — 4 November 2014
Product data sheet
1. General description
The PCA9509 is a level translating I2C-bus/SMBus repeater that enables processor low voltage 2-wire serial bus to interface with standard I2C-bus or SMBus I/O. While retaining all the operating modes and features of the I2C-bus system during the level shifts, it also permits extension of the I2C-bus by providing bidirectional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling the I2C-bus or SMBus maximum capacitance of 400 pF on the higher voltage side. Port A allows a voltage range from 1.35 V to VCC(B) 1.0 V and requires no external pull-up resistors due to the internal current source. Port B allows a voltage range from 3.0 V to 5.5 V and is overvoltage tolerant. Both port A and port B SDA and SCL pins are high-impedance when the PCA9509 is unpowered.
For applications where Port A VCC(A) is less than 1.35 V or Port B VCC(B) is less than 3.0 V, use drop-in replacement PCA9509A.
The bus port B drivers are compliant with SMBus I/O levels, while port A uses a current sensing mechanism to detect the input or output LOW signal which prevents bus lock-up. Port A uses a 1 mA current source for pull-up and a 200 pull-down driver. This results in a LOW on the port A accommodating smaller voltage swings. The output pull-down on the port A internal buffer LOW is set for approximately 0.2 V, while the input threshold of the internal buffer is ...
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