Secure Microcontrollers. AT91SC512384RCT Datasheet

AT91SC512384RCT Datasheet PDF, Equivalent


Part Number

AT91SC512384RCT

Description

32-bit Secure Microcontrollers

Manufacture

ATMEL Corporation

Total Page 5 Pages
PDF Download
Download AT91SC512384RCT Datasheet PDF


AT91SC512384RCT Datasheet
www.DataSheet4U.com
Features
General
Based on the ARM® SC100SecureCore32-bit RISC Processor
Two Instruction Sets
– ARM High-performance 32-bit Instruction Set
– Thumb® High-code-density 16-bit Instruction Set
Von Neumann Load/Store Architecture
– Single 32-bit Data Bus for Instructions and Data
3-stage Pipeline Architecture
– Fetch, Decode, and Execute Stages
8-bit, 16-bit, and 32-bit Data Types
On-chip Programmable System Clock up to 50MHz
Very Low Power Consumption
– Industry Leader in MIPS/Watt
– Low power Idle and Power down Modes
Bond Pad Locations Confirming to ISO7816-2
ESD Protection to ±6000V
Operating ranges: 1.62V to 5.5V, GSM/3G Compliant, PC Industry Compatible, EMV
Memory
512K Bytes of ROM Program Memory
384K Bytes of EEPROM, Including 256 OTP Bytes
– Typically More than 500,000 Write/Erase Cycles at a Temperature of 25oC
– 10 Years Data Retention
EEPROM Erase Only Mode
Write EEPROM With or Without Autoerase
24K Bytes of RAM (2K Bytes shared with AdvX crypto processor)
32K Bytes of ROM dedicated to Atmel’s crypto Library
Peripherals
One ISO 7816 Controller
– Up to 625kbps at 5 MHz
Serial Peripheral Interface (SPI) Controller (up to 20MHz)
USB Interface (5 Endpoints)
– USB V2.0 Full-speed (12Mbps), Suspend/Resume Modes Supported
– 4 Configurable Endpoints in Addition to Endpoint EP0
– Dynamic Pull-up Attachment
USB_IC (Inter Chip) 0.8e Interface
Interface for External NAND Flash Memory
Single Wire Interface (Digital Interface to RF front end chip)
Two 16-bit Timers
Random Number Generator (RNG)
2-level, 15-vector Interrupt Controller
Hardware DES and Triple DES (DPA Resistant)
Checksum Accelerator
CRC 16/32 Engine
32-bit Cryptographic Accelerator for Public Key Operations
– RSA, DSA, ECC, Diffie-Hellman
High performance Hardware Java Card Accelerator
Security
Dedicated Hardware for Protection Against SPA/DPA Attacks
Protection Against Physical Attack
Environmental Protection Systems
Voltage, Frequency, Light, and Temperature Protection Systems
32-bit Secure
Microcontrollers
AT91SC
512384RCT
Summary
6525AS–SMIC–16Jan06
Note: This is a summary document. A complete document will be
available under NDA. For more information, please contact your
local Atmel sales office.

AT91SC512384RCT Datasheet
Secure Memory Management/Access Protection
Development Tools
Hardware Development Support on the ATV4-91SC Voyager Emulation Platform
Software Libraries and Application Notes
Description
The AT91SC512384RCT is a low power, high performance, 32-bit RISC microcontroller with ROM program memory,
EEPROM data memory, and cryptographic accelerator, based on the ARM SC100 advanced secure processor. This
general purpose 32-bit processor offers high performance, very low power consumption, and additional features to help
combat fraud.
The AT91SC512384RCT features 384K bytes of high performance EEPROM (fast erase/write time, high endurance).
The AT91SC512384RCT also features a USB full speed 2.0 port to allow very high speed transactions with a USB host
terminal. USB interface requires the addition of an external 48MHz resonator.
The AT91SC512384RCT features a SPI (Serial Peripheral Interface) port to provide either high speed interface with
external terminal or to connect external NOR Flash memory. It also features an interface for NAND Flash memory.
On top of the SC100s MPU, a real hardware firewall can be used to increase the overall security level of the application
without intense software development.
The cryptographic accelerator featured in the AT91SC series is the AdvX, an N-bit multiplier-accumulator dedicated to
performing fast encryption and authentication functions. AdvX is based on a custom 32-bit co-processor, thus enabling fast
computation and low power operation. The AdvX in conjuction with controlling firmware running within the SC100 core,
supports standard finite arithmetic functions (including RSA, DSA, DH and ECC) and GF(2N).
Unique hardware features significantly accelerate the execution of Java Card Byte Code by removing the common software
bottlenecks encountered during the implementation of a Java Virtual Machine.
Additional security features include power and frequency protection logic, logical scrambling on program data and
addresses, power analysis countermeasures, and memory access controlled by a supervisor mode.
Pin Configuration
The AT91SC512384RCT pinout configuration confirms to the ISO7816-2 interface.
Note: By convention, the RST pin corresponds to the RST signal of the ISO7816-3 Protocol, both are active low.)
GND
Vcc
ISO I/O0
ISO CLK
ISO RST
C6
USB D+
USB D-
USB XIN
Ground (reference voltage)
WE
Power Supply Input
ALE
Input or Output for serial data (ISO7816
CLE
Clock signal input to external clock operating circuit CE
Reset signal input, a low state stops the ARM core RE
SWP dedicated pin
IO0
USB D+
IO1
USB D-
IO2
USB XIN
IO3
Flash Interface (Write Enable)
Flash Interface (Address Latch Enable)
Flash Interface (Command Latch Enable)
Flash Interface (Chip Enable)
Flash Interface (Read Enable)
Flash Interface IO0
Flash Interface IO1
Flash Interface IO2
Flash Interface IO3
2 AT91SC512384RCT
6525AS–SMIC–16Jan06


Features Datasheet pdf www.DataSheet4U.com Features General Based on the ARM® SC100 SecureCor e 32-bit RISC Processor • Two Inst ruction Sets • • • • • • • – ARM High-performance 32-bit I nstruction Set – Thumb® High-code-de nsity 16-bit Instruction Set Von Neuman n Load/Store Architecture – Single 32 -bit Data Bus for Instructions and Data 3-stage Pipeline Architecture – Fetc h, Decode, and Execute Stages 8-bit, 16 -bit, and 32-bit Data Types On-chip Pro grammable System Clock up to 50MHz Very Low Power Consumption – Industry Lea der in MIPS/Watt – Low power Idle and Power down Modes Bond Pad Locations Co nfirming to ISO7816-2 ESD Protection to ±6000V Operating ranges: 1.62V to 5.5 V, GSM/3G Compliant, PC Industry Compat ible, EMV 32-bit Secure Microcontrolle rs Memory • 512K Bytes of ROM Progra m Memory • 384K Bytes of EEPROM, Incl uding 256 OTP Bytes • • • • – Typically More than 500,000 Write/Eras e Cycles at a Temperature of 25oC – 10 Years Data Retention EEPROM Erase Only Mode Write EEPROM With or Without Auto.
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