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74LVXU04 Dataheets PDF



Part Number 74LVXU04
Manufacturers ST Microelectronics
Logo ST Microelectronics
Description LOW VOLTAGE CMOS HEX INVERTER
Datasheet 74LVXU04 Datasheet74LVXU04 Datasheet (PDF)

www.DataSheet4U.com 74LVXU04 LOW VOLTAGE CMOS HEX INVERTER (SINGLE STAGE) WITH 5V TOLERANT INPUTS s s s HIGH SPEED: tPD = 5.0ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 04 IMPROVED LATCH-UP IMMUN.

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www.DataSheet4U.com 74LVXU04 LOW VOLTAGE CMOS HEX INVERTER (SINGLE STAGE) WITH 5V TOLERANT INPUTS s s s HIGH SPEED: tPD = 5.0ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 04 IMPROVED LATCH-UP IMMUNITY POWER DOWN PROTECTION ON INPUTS SOP TSSOP s s Table 1: Order Codes PACKAGE SOP TSSOP T&R 74LVXU04MTR 74LVXU04TTR s s s s s DESCRIPTION The 74LVXU04 is a low voltage CMOS HEX INVERTER (SINGLE STAGE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications. Figure 1: Pin Connection And IEC Logic Symbols As the internal circuit is composed of a single stage inverter, it can be used in analog application such as crystal oscillator. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V system. It combines high speed performance with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. August 2004 Rev. 4 1/11 74LVXU04 Figure 2: Input Equivalent Circuit Table 2: Pin Description PIN N° 1, 3, 5, 9, 11, 13 2, 4, 6, 8, 10, 12 7 14 SYMBOL 1A to 6A 1Y to 6Y GND VCC NAME AND FUNCTION Data Inputs Data Outputs Ground (0V) Positive Supply Voltage Table 3: Truth Table A L H Y H L Table 4: Absolute Maximum Ratings Symbol VCC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 ± 20 ± 25 ± 50 -65 to +150 300 Unit V V V mA mA mA mA °C °C ICC or IGND DC VCC or Ground Current Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Table 5: Recommended Operating Conditions Symbol VCC VI VO Top dt/dv Supply Voltage (note 1) Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time (note 2) (VCC = 3.3V) Parameter Value 2 to 3.6 0 to 5.5 0 to VCC -55 to 125 0 to 100 Unit V V V °C ns/V 1) Truth Table guaranteed: 1.2V to 3.6V 2) VIN from 0.8V to 2.0V 2/11 74LVXU04 Table 6: DC Specifications Test Condition Symbol Parameter VCC (V) 2.0 3.0 to 3.6 2.0 3.0 to 3.6 2.0 3.0 3.0 VOL Low Level Output Voltage 2.0 3.0 3.0 II ICC Input Leakage Current Quiescent Supply Current 3.6 3.6 IO=-50 µA IO=-50 µA IO=-4 mA IO=50 µA IO=50 µA IO=4 mA VI = 5V or GND VI = VCC or GND 1.9 2.9 2.58 0.0 0.0 0.1 0.1 0.36 ± 0.1 2 2.0 3.0 TA = 25°C Min. 1.7 0.8 VCC 0.3 0.2 VCC 1.9 2.9 2.48 0.1 0.1 0.44 ±1 20 Typ. Max. Value -40 to 85°C Min. 1.7 0.8 VCC 0.3 0.2 VCC 1.9 2.9 2.4 0.1 0.1 0.55 ±1 20 µA µA V V Max. -55 to 125°C Min. 1.7 0.8 VCC 0.3 0.2 VCC Max. V Unit VIH High Level Input Voltage Low Level Input Voltage High Level Output Voltage VIL V VOH Table 7: Dynamic Switching Characteristics Test Condition Symbol Parameter VCC (V) 3.3 3.3 CL = 50 pF 3.3 0.8 TA = 25°C Min. Typ. 0.3 -0.5 2 V -0.3 Max. 0.5 Value -40 to 85°C Min. Max. -55 to 125°C Min. Max. Unit VOLP VOLV VIHD VILD Dynamic Low Voltage Quiet Output (note 1, 2) Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3) 1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD), f=1MHz. 3/11 74LVXU04 Table 8: AC Electrical Characteristics (Input tr = tf = 3ns) Test Condition Symbol Parameter VCC (V) 2.7 2.7 3.3(*) tOSLH tOSHL Output To Output Skew Time (note1, 2) 3.3(*) 2.7 3.3(*) CL (pF) 15 50 15 50 50 50 TA = 25°C Min. Typ. 6.5 8.5 5.0 7.5 0.5 0.5 Max. 10.4 13.0 8.9 11.4 1.0 1.0 Value -40 to 85°C Min. 1.0 1.0 1.0 1.0 Max. 13.7 15.2 10.5 13.0 1.5 1.5 -55 to 125°C Min. 1.0 1.0 1.0 1.0 Max. 13.7 15.2 10.5 13.0 1.5 1.5 ns ns Unit tPLH tPHL Propagation Delay Time 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW 2) Parameter guaranteed by design (*) Voltage range is 3.3V ± 0.3V Table 9: Capacitive Characteristics Test Condition Symbol Parameter VCC (V) 3.3 3.3 TA = 25°C Min. Typ. 5 9 Max. 10 Value -40 to 85°C Min. Max. 10 -55 to 125°C Min. Max. 10 pF pF Unit CIN CPD Input Capacitance Power Dissipation Capacitance (note 1) 1) CPD is defined as the v.


2DI75M-120 74LVXU04 A2543B


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