SY10H603

Micrel, Inc. 9-BIT LATCHED ECL-TO-TTL SY10H603 SY1S0YH10600H3603 SY100H603 FEATURES s 9-bit ideal for byte-parity applications s 3-state TTL outputs s Flow-through configuration s Extra TTL and ECL power/ground pins to minimize switching noise s Dual supply s 6.0ns max. delay into 50pF, 12ns into 200pF (all outputs switching) s PNP TTL inputs for low loading s Choice of ECL compatibility: MECL 10KH (10Hxxx) or 100K (100Hxxx) s Fully compatible with MC10H/100H603 s Available in 28-pin PLCC package DESCRIPTION The SY10/100H603 are 9-bit, dual supply ECL-to-TTL translators. Devices in the Micrel 9-bit translator series utilize the 28-lead PLCC for optimal power pinning, signal flow-through and electrical performance. The devices feature a 48mA TTL output stage and AC performance is specified into both a 50pF and 200pF load capacitance. Latching is controlled by Latch Enable (LEN) and Master Reset (MR) resets the latches. A HIGH on OEECL sends the outputs into the high impedance state. All control inputs are ECL level. The 10H version is compatible with MECL 10KH ECL logic levels. The 100H version is compatible with 100K levels. BLOCK DIAGRAM OEECL D0 D1 D2 D3 ECL D4 D5 D6 D7 D8 LEN MR DQ EN DQ EN DQ EN DQ EN DQ EN DQ EN DQ EN DQ EN DQ EN M9999-032906 [email protected] or (408) 955-1690 PIN NAMES Pin Function GND TTL Ground (0V) Q0 VCCE ECL VCC (0V) VCCT TTL Supply (+5.0V) Q1 VEE ECL Supply (–5.2/–4.5V) D0–D8 Data Inputs (ECL) Q2 Q0–Q8 Data Outpu...