DISK CONTROLLER. 82077AA Datasheet

82077AA Datasheet PDF, Equivalent


Part Number

82077AA

Description

CHMOS SINGLE-CHIP FLOPPY DISK CONTROLLER

Manufacture

Intel Corporation

Total Page 30 Pages
PDF Download
Download 82077AA Datasheet PDF


82077AA Datasheet
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82077AA
CHMOS SINGLE-CHIP FLOPPY DISK CONTROLLER
Y Single-Chip Floppy Disk Solution
100% PC AT Compatible
100% PS 2 Compatible
100% PS 2 Model 30 Compatible
Integrated Drive and Data Bus
Buffers
Y Integrated Analog Data Separator
250 Kbits sec
300 Kbits sec
500 Kbits sec
1 Mbits sec
Y High Speed Processor Interface
Y Perpendicular Recording Support
Y Integrated Tape Drive Support
Y 12 mA Host Interface Drivers 40 mA
Disk Drivers
Y Four Fully Decoded Drive Select and
Motor Signals
Y Programmable Write Precompensation
Delays
Y Addresses 256 Tracks Directly
Supports Unlimited Tracks
Y 16 Byte FIFO
Y 68-Pin PLCC
(See Packaging Spec Order 240800 Package Type N)
The 82077AA floppy disk controller has completely integrated all of the logic required for floppy disk control
The 82077AA a 24 MHz crystal a resistor package and a device chip select implements a PC AT or PS 2
solution All programmable options default to compatible values The dual PLL data separator has better
performance than most board level discrete PLL implementations The FIFO allows better system perform-
ance in multi-master systems (e g PS 2 EISA) The 82077AA is available in three versions 82077AA-5
82077AA and 82077AA-1 82077AA-1 has all features listed in this data sheet It supports both tape drives and
4 Mb floppy drives The 82077AA supports 4 Mb floppy drives and is capable of operation at all data rates
through 1 Mbps The 82077AA-5 supports 500 300 250 Kbps data rates for high and low density floppy
drives
The 82077AA is fabricated with Intel’s CHMOS III technology and is available in a 68-lead PLCC (plastic)
package
PS 2 and PC AT are trademarks of IBM
Figure 1 82077AA Pinout
May 1994
290166 – 1
Order Number 290166-007

82077AA Datasheet
82077AA CHMOS Single-Chip Floppy Disk Controller
CONTENTS
PAGE
1 0 INTRODUCTION
1 1 Oscillator
1 2 Perpendicular Recording Mode
7
8
8
2 0 MICROPROCESSOR INTERFACE
2 1 Status Data and Control
Registers
2 1 1a Status Register A
(SRA PS 2 Mode)
2 1 1b Status Register A
(SRA Model 30 Mode)
2 1 2a Status Register B
(SRB PS 2 Mode)
2 1 2b Status Register B
(SRB Model 30 Mode)
2 1 3 Digital Output Register
(DOR)
2 1 4 Tape Drive Register (TDR)
2 1 5 Datarate Select Register
(DRS)
2 1 6 Main Status Register
(MSR)
2 1 7 FIFO (Data)
2 1 8a Digital Input Register
(DIR PC-AT Mode)
2 1 8b Digital Input Register
(DIR PS 2 Mode)
2 1 8c Digital Input Register
(DIR Model 30 Mode)
2 1 9a Configuration Control
Register
(CCR PC AT and PS 2 Modes)
2 1 9b Configuration Control
Register
(CCR Model 30 Mode)
2 2 RESET
2 2 1 Reset Pin (‘‘Hardware’’)
Reset
2 2 2 DOR Reset vs DSR Reset
(‘‘Software’’ Reset)
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8
8
8
9
9
9
9
10
10
11
11
11
12
12
12
12
12
12
CONTENTS
2 3 DMA Transfers
PAGE
12
3 0 DRIVE INTERFACE
3 1 Cable Interface
3 2 Data Separator
3 2 1 Jitter Tolerance
3 2 2 Locktime (tLOCK)
3 2 3 Capture Range
3 2 4 Reference Filter
3 3 Write Precompensation
12
13
13
14
14
14
15
15
4 0 CONTROLLER PHASES
4 1 Command Phase
4 2 Execution Phase
4 2 1 Non-DMA Mode Transfers
from the FIFO to the Host
4 2 2 Non-DMA Mode Transfers
from the Host to the FIFO
4 2 3 DMA Mode Transfers from
the FIFO to the Host
4 2 4 DMA Mode Transfers from
the Host to the FIFO
4 2 5 Data Transfer Termination
4 3 Result Phase
15
15
16
16
16
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5 0 COMMAND SET DESCRIPTIONS
5 1 Data Transfer Commands
5 1 1 Read Data
5 1 2 Read Deleted Data
5 1 3 Read Track
5 1 4 Write Data
5 1 5 Write Deleted Data
5 1 6 Verify
5 1 7 Format Track
5 1 7 1 Format Fields
5 1 8 Scan Commands
17
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Features Datasheet pdf www.DataSheet4U.com 82077AA CHMOS SINGL E-CHIP FLOPPY DISK CONTROLLER Y Single -Chip Floppy Disk Solution 100% PC AT C ompatible 100% PS 2 Compatible 100% PS 2 Model 30 Compatible Integrated Drive and Data Bus Buffers Integrated Analog Data Separator 250 Kbits sec 300 Kbits sec 500 Kbits sec 1 Mbits sec High Spee d Processor Interface Perpendicular Rec ording Support Y Y Integrated Tape Dr ive Support 12 mA Host Interface Driver s 40 mA Disk Drivers Four Fully Decoded Drive Select and Motor Signals Program mable Write Precompensation Delays Addr esses 256 Tracks Directly Supports Unli mited Tracks 16 Byte FIFO 68-Pin PLCC ( See Packaging Spec Order 240800 Package Type N) Y Y Y Y Y Y Y Y The 820 77AA floppy disk controller has complet ely integrated all of the logic require d for floppy disk control The 82077AA a 24 MHz crystal a resistor package and a device chip select implements a PC AT or PS 2 solution All programmable opti ons default to compatible values The dual PLL data separator ha.
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