MC74HC138A

www.DataSheet4U.com MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1-of-8 Decoder/Demultiplexer High–Performance Silicon–Gate CMOS The MC54/74HC138A is identical in pinout to the LS138. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC138A decodes a three–bit Address to one–of–eight active–low outputs. This device features three Chip Select inputs, two active–low and one active–high to facilitate the demultiplexing, cascading, and chip–selecting functions. The demultiplexing function is accomplished by using the Address inputs to select the desired device output; one of the Chip Selects is used as a data input while the other Chip Selects are held in their active states. Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 µA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 100 FETs or 29 Equivalent Gates LOGIC DIAGRAM 1 2 3 15 MC54/74HC138A 16 1 J SUFFIX CERAMIC PACKAGE CASE 620–10 16 1 N SUFFIX PLASTIC PACKAGE CASE 648–08 16 1 D SUFFIX SOIC PACKAGE CASE 751B–05 16 1 DT SUFFIX TSSOP PACKAGE CASE 948F–01 ORDERING INFORMATION MC54HCXXXAJ MC74HCXXXAN MC74HCXXXAD MC74HCXXXADT ACTIVE–LOW OUTPUTS Ceramic Plastic SOIC TSSOP A0 ADDRESS INPUTS A1 A2 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5 9 Y6 7 Y7 PIN ASSIG...