PI6C48535-01

www.DataSheet4U.com PI6C48535-01 3.3V Low Skew 1-to-4 LVTTL/LVCMOS to LVPECL Fanout Buffer Features Maximum operation frequency: 500 MHz 4 pair of differential LVPECL outputs Selectable CLK0 and CLK1 inputs CLK0, CLK1 accept LVCMOS, LVTTL input level Output Skew: 80ps (maximum) Part-to-part skew: 150ps (maximum) Propagation delay: 1.9ns (maximum) 3.3V power supply Pin-to-pin compatible to ICS8535-01 Operating Temperature: -40oC to 85oC Packaging (Pb-free & Green available): — 20-pin TSSOP (L) Description The PI6C48535-01 is a high-performance low-skew LVPECL fanout buffer. PI6C48535-01 features two selectable single-ended clock inputs and translates to four LVPECL outputs. The CLK0 and CLK1 inputs accept LVCMOS or LVTTL signals. The outputs are synchronized with input clock during asynchronous assertion/ deassertion of CLK_EN pin. PI6C48535-01 is ideal for singleended LVTTL/LVCMOS to LVPECL translations. Typical clock translation and distribution applications are data-communications and telecommunications. Block Diagram CLK_EN D LE CLK CLK1 0 1 Q0 nQ0 Q1 nQ1 CLK_SEL Q2 nQ2 Q3 nQ3 Pin Configuration Q VEE CLK_EN CLK_SEL CLK0 NC CLK1 NC NC NC VCC 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 Q0 NQ0 VCC Q1 NQ1 Q2 NQ2 VCC Q3 NQ3 1 PS8735A 11/15/05 PI6C48535-01 3.3V Low Skew 1-to-4 LVTTL/LVCMOS to LVPECL Fanout Buffer Pin Description Name VEE CLK_EN CLK_SEL CLK0 CLK1 NC VCC Q3, nQ3 Q2, nQ2 Q1, nQ1 Q0, nQ0 Pin # 1 2 3 4 6 5, 7, 8, 9 10, 13, 18...