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8XC198 COMMERCIAL EXPRESS CHMOS MICROCONTROLLER
8 Kbytes of OTPROM
Y Y Y Y Y Y Y Y Y
8 Kbytes of On-Chip OTPROM or ROM 232 Byte Register File Register-to-Register Architecture 28 Interrupt Sources 16 Vectors 1 75 ms 16 x 16 Multiply (16 MHz) 3 0 ms 32 16 Divide (16 MHz) Powerdown and Idle Modes 16-Bit Watchdog Timer 8-Bit External Bus
Y Y Y Y Y Y Y Y Y
16 MHz Standard Full Duplex Serial Port High Speed I O Subsystem 16-Bit Timer 16-Bit Counter Pulse-Width-Modulated Output Four 16-Bit Software Timers 10-Bit A D Converter with Sample Hold Extended Temperature Available
The 8XC198 family offers low-cost entry into Intel’s powerful MCS -96 16-bit microcontroller architecture Intel’s CHMOS process provides a high performance processor along with low power consumption To further reduce power requirements the processor can be placed into Idle or Powerdown Mode The 8XC198 is the 8-bit bus version of the 8XC196KB The prefixes mean 80 (ROMless) 83 (ROM) 87 (OTP) One Time Programmable The ROM and OTP are available in 8 Kbytes Bit byte word and some 32-bit operations are available on the 8XC198 With a 16 MHz oscillator a 16-bit addition takes 0 50 ms and the instruction times average 0 37 ms to 1 1 ms in typical applications Four high-speed capture inputs are provided to record times when events occur Six high-speed outputs are available for pulse or waveform generation The high-speed output can also generate four software timers or start an A D conversion Events can be based on the timer or counter Also provided on-chip are an A D converter serial port watchdog timer and a pulse-width-modulated output signal With the commercial (standard) temperature option operational characteristics are guaranteed over the temperature range of 0 C to a 70 C Wth the extended temperature range option operational characteristics are guaranteed over the temperature range of b 40 C to a 85 C
MCS -96 is a registered trademark of Intel Corporation
Other brands and names are the property of their respective owners Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT
INTEL CORPORATION 1995
October 1992
Order Number 272034-003
8XC198
272034 – 1
Figure 1 87C198 Block Diagram
0FFFFH EXTERNAL MEMORY OR I O 4000H INTERNAL ROM EPROM OR EXTERNAL MEMORY 2080H RESERVED 2040H UPPER 8 INTERRUPT VECTORS 2030H ROM OTP SECURITY KEY 2020H RESERVED 2019H CHIP CONFIGURATION BYTE 2018H RESERVED 2014H LOWER 8 INTERRUPT VECTORS PLUS 2 SPECIAL INTERRUPTS 2000H PORT 3 AND PORT 4 1FFEH EXTERNAL MEMORY OR I O 0100H INTERNAL DATA MEMORY - REGISTER FILE (STACK POINTER RAM AND SFRS) EXTERNAL PROGRAM CODE MEMORY
272034 – 7
Figure 3 Chip Configuration (2018H)
0000H
Figure 2 Memory Map
WARNING Reserved memory locations must not be written or read The contents and or function of these locations may change with future revisions of the device Therefore a program that relies on one or more of these locations may not function properly
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8XC198
PACKAGING
The 8XC198 is available in a 52-pin PLCC package and an 80-pin QFP package Contact your local sales office to determine the exact ordering code for the part desired
Package Designators N e 52-pin PLCC S e 80-pin QFP
Thermal Characteristics
Package Type PLCC QFP ija 40 C W 70 C W 4C W ijc
All thermal impedance data is approximate for static air conditions at 1W of power dissipation Values will change depending on operating conditions and application See the Intel Packaging Handbook (Order Number 240800) for a description of Intel’s thermal impedance test methodology
272034 – 2
Figure 4 52-Pin PLCC Package
NOTE The above pinout diagram applies to the OTP (87C198) device The OTP device uses all of the programming pins shown above The ROM (83C198) device only uses programming pins AINC PALE PMODE n and PROG The ROMless (80C198) doesn’t use any of the programming pins
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8XC198
272034 – 4
NOTE N C means No Connect (do not connect these pins)
Figure 5 80-Pin QFP Package
NOTE The above pinout diagram applies to the OTP (87C198) device The OTP device uses all of the programming pins shown above The ROM (83C198) device only uses programming pins AINC PALE PMODE n and PROG The ROMless (80C198) doesn’t use any of the programming pins
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8XC198
PIN DESCRIPTIONS
Symbol VCC VSS VREF Main supply voltage (5V) The PLCC package has 5 VSS pins and the QFP package has 12 VSS pins All must be connected to digital ground Reference voltage for the A D converter (5V) VREF is also the supply voltage to the analog portion of the A D converter and the logic used to read Port 0 Must be connected for A D.