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MBM29F160TE Dataheets PDF



Part Number MBM29F160TE
Manufacturers Fujitsu Media Devices
Logo Fujitsu Media Devices
Description 16M (2M X 8/1M X 16) BIT
Datasheet MBM29F160TE DatasheetMBM29F160TE Datasheet (PDF)

www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS05-20879-2E FLASH MEMORY CMOS 16M (2M × 8/1M × 16) BIT MBM29F160TE/BE-55/-70/-90 s GENERAL DESCRIPTION The MBM29F160TE/BE is a 16M-bit, 5.0 V-only Flash memory organized as 2M bytes of 8 bits each or 1M words of 16 bits each. The MBM29F160TE/BE is offered in a 48-pin TSOP (I) package. The device is designed to be programmed in-system with the standard system 5.0 V VCC supply. 12.0 V VPP is not required for write or erase operations. The.

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www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS05-20879-2E FLASH MEMORY CMOS 16M (2M × 8/1M × 16) BIT MBM29F160TE/BE-55/-70/-90 s GENERAL DESCRIPTION The MBM29F160TE/BE is a 16M-bit, 5.0 V-only Flash memory organized as 2M bytes of 8 bits each or 1M words of 16 bits each. The MBM29F160TE/BE is offered in a 48-pin TSOP (I) package. The device is designed to be programmed in-system with the standard system 5.0 V VCC supply. 12.0 V VPP is not required for write or erase operations. The device can also be reprogrammed in standard EPROM programmers. The standard MBM29F160TE/BE offers access times of 55 ns, 70 ns and 90 ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention the device has separate chip enable (CE), write enable (WE), and output enable (OE) controls. The MBM29F160TE/BE is pin and command set compatible with JEDEC standard E2PROMs. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from 12.0 V Flash or EPROM devices. (Continued) s PRODUCT LINE UP Part No. Ordering Part No. VCC = 5.0 V±5% VCC = 5.0 V±10% -55 — 55 55 30 MBM29F160TE/160BE — -70 70 70 30 — -90 90 90 40 Max. Address Access Time (ns) Max. CE Access Time (ns) Max. OE Access Time (ns) s PACKAGES 48-pin plastic TSOP (I) Marking Side Marking Side (FPT-48P-M19) (FPT-48P-M20) MBM29F160TE-55/-70/-90/MBM29F160BE-55/-70/-90 (Continued) The MBM29F160TE/BE is programmed by executing the program command sequence. This will invoke the Embedded ProgramTM* Algorithm which is an internal algorithm that automatically times the program pulse widths and verifies proper cell margins. Typically, each sector can be programmed and verified in about 0.5 seconds. Erase is accomplished by executing the erase command sequence. This will invoke the Embedded EraseTM* Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed before executing the erase operation. During erase, the device automatically times the erase pulse widths and verifies proper cell margins. Any individual sector is typically erased and verified in 1.0 second. (If already preprogrammed.) The device also features a sector erase architecture. The sector mode allows each sector to be erased and reprogrammed without affecting other sectors. The MBM29F160TE/BE is erased when shipped from the factory. The device features single 5.0 V power supply operation for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations. A low VCC detector automatically inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling.


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