AD7952 PulSAR ADC Datasheet

AD7952 Datasheet, PDF, Equivalent


Part Number

AD7952

Description

Programmable Input PulSAR ADC

Manufacture

Analog Devices

Total Page 30 Pages
Datasheet
Download AD7952 Datasheet


AD7952
Data Sheet
14-Bit, 1 MSPS, Differential,
Programmable Input PulSAR® ADC
AD7952
FEATURES
Multiple pins/software-programmable input ranges
+5 V (10 V p-p), +10 V (20 V p-p), ±5 V (20 V p-p),
±10 V (40 V p-p)
Pins or serial SPI®-compatible input ranges/mode selection
Throughput
1 MSPS (warp mode)
800 kSPS (normal mode)
670 kSPS (impulse mode)
14-bit resolution with no missing codes
INL: ±0.3 LSB typical, ±1 LSB maximum (±61 ppm of FSR)
SNR: 85 dB @ 2 kHz
iCMOS® process technology
5 V internal reference: typical drift 3 ppm/°C; TEMP output
No pipeline delay (SAR architecture)
Parallel (14- or 8-bit bus) and serial 5 V/3.3 V interface
SPI-/QSPI™-/MICROWIRE™-/DSP-compatible
Power dissipation
235 mW @ 1 MSPS
10 mW @ 1 kSPS
48-lead LQFP and 48-lead LFCSP (7 mm × 7 mm)
APPLICATIONS
Process controls
Medical instruments
High speed data acquisition
Digital signal processing
Instrumentation
Spectrum analysis
ATE
GENERAL DESCRIPTION
The AD7952 is a 14-bit, charge redistribution, successive
approximation register (SAR) architecture analog-to-digital
converter (ADC) fabricated on Analog Devices, Inc.’s iCMOS
high voltage process. The device is configured through hardware or
via a dedicated write-only serial configuration port for input
range and operating mode. The AD7952 contains a high speed
14-bit sampling ADC, an internal conversion clock, an internal
reference (and buffer), error correction circuits, and both serial
and parallel system interface ports. A falling edge on CNVST
samples the fully differential analog inputs on IN+ and IN−.
The AD7952 features four different analog input ranges and three
different sampling modes: warp mode for the fastest throughput,
normal mode for the fastest asynchronous throughput, and
impulse mode where power is scaled with throughput.
Operation is specified from −40°C to +85°C.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
FUNCTIONAL BLOCK DIAGRAM
TEMP REFBUFIN REF REFGND VCC VEE DVDD DGND
AGND
AVDD
PDREF
PDBUF
IN+
IN–
REF
AMP
REF
SWITCHED
CAP DAC
CNVST
PD
RESET
CLOCK
CONTROL LOGIC AND
CALIBRATION CIRCUITRY
AD7952
SERIAL DATA
PORT
SERIAL
CONFIGURATION
PORT
14
PARALLEL
INTERFACE
OVDD
OGND
D[13:0]
SER/PAR
BYTESWAP
OB/2C
BUSY
RD
CS
WARP IMPULSE BIPOLAR TEN
Figure 1.
Table 1. 48-Lead PulSAR Selection
Input Type
100 to
Res 250
(Bits) (kSPS)
500 to
570
(kSPS)
Bipolar
14
Differential
Bipolar
14
Unipolar
16 AD7651
AD7660 AD7650
AD7661 AD7652
AD7664
AD7666
Bipolar
16 AD7610 AD7665
AD7663
Differential 16 AD7675 AD7676
Unipolar
Simultaneous/
Multichannel
Unipolar
Differential
Unipolar
Differential
Bipolar
16
18
18
AD7654
AD7655
AD7678 AD7679
AD7631
570 to
1000
(kSPS)
AD7951
AD7952
>1000
kSPS
AD7653
AD7667
AD7612
AD7671
AD7677
AD7621
AD7622
AD7623
AD7674
AD7634
AD7641
AD7643
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2007–2012 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

AD7952
AD7952
TABLE OF CONTENTS
Features .............................................................................................. 1 
Applications....................................................................................... 1 
General Description ......................................................................... 1 
Functional Block Diagram .............................................................. 1 
Revision History ............................................................................... 2 
Specifications..................................................................................... 3 
Timing Specifications .................................................................. 5 
Absolute Maximum Ratings............................................................ 7 
ESD Caution.................................................................................. 7 
Pin Configuration and Function Descriptions............................. 8 
Typical Performance Characteristics ........................................... 12 
Terminology .................................................................................... 16 
Theory of Operation ...................................................................... 17 
Overview...................................................................................... 17 
Converter Operation.................................................................. 17 
Modes of Operation ................................................................... 18 
Transfer Functions...................................................................... 18 
Typical Connection Diagram ................................................... 18 
Analog Inputs.............................................................................. 20 
REVISION HISTORY
12/12—Rev. 0 to Rev. A
Added Exposed Pad Note................................................................ 8
Changes to Power Sequencing Section........................................ 23
Deleted Evaluating Performance Section .................................... 31
Updated Outline Dimensions ....................................................... 32
Changes to Ordering Guide .......................................................... 32
2/07—Revision 0: Initial Version
Data Sheet
Driver Amplifier Choice ........................................................... 21 
Voltage Reference Input/Output .............................................. 22 
Power Supplies ............................................................................ 22 
Conversion Control ................................................................... 23 
Interfaces.......................................................................................... 24 
Digital Interface.......................................................................... 24 
Parallel Interface......................................................................... 24 
Serial Interface ............................................................................ 25 
Master Serial Interface............................................................... 25 
Slave Serial Interface .................................................................. 27 
Hardware Configuration ........................................................... 29 
Software Configuration ............................................................. 29 
Microprocessor Interfacing....................................................... 30 
Application Information................................................................ 31 
Layout Guidelines....................................................................... 31 
Outline Dimensions ....................................................................... 32 
Ordering Guide .......................................................................... 32 
Rev. A | Page 2 of 32


Features www.DataSheet4U.com 14-Bit, 1 MSPS, Dif ferential, Programmable Input PulSAR® ADC AD7952 FEATURES Multiple pins/softw are-programmable input ranges +5 V (10 V p-p), +10 V (20 V p-p), ±5 V (20 V p -p), ±10 V (40 V p-p) Pins or serial S PI®-compatible input ranges/mode selec tion Throughput 1 MSPS (warp mode) 800 kSPS (normal mode) 670 kSPS (impulse mo de) 14-bit resolution with no missing c odes INL: ±0.3 LSB typical, ±1 LSB ma ximum (±61 ppm of FSR) SNR: 85 dB @ 2 kHz iCMOS® process technology 5 V inte rnal reference: typical drift 3 ppm/°C ; TEMP output No pipeline delay (SAR ar chitecture) Parallel (14- or 8-bit bus) and serial 5 V/3.3 V interface SPI-/QS PI™-/MICROWIRE™-/DSP-compatible Pow er dissipation 235 mW @ 1 MSPS 10 mW @ 1 kSPS 48-lead LQFP and 48-lead LFCSP ( 7 mm × 7 mm) AGND AVDD PDREF PDBUF IN+ IN– SWITCHED CAP DAC REF FUNCTIONAL BLOCK DIAGRAM TEMP REFBUFIN REF REFGND VCC VEE DVDD DGND OVDD OGND REF AMP AD7952 SERIAL DATA PORT SERIAL CONFIGURATION 14 PORT D[13:0] SER/PAR BYTESWAP .
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